Hi,
Many thanks for reviewing the patches and provide your comments!
Please check my comments below. Thanks!
On 16-09-30 16:32:33, Konrad Rzeszutek Wilk wrote:
> On Thu, Sep 22, 2016 at 10:14:00AM +0800, Yi Sun wrote:
> > Design document is below:
>
> Could the design document be a patch itself
On Thu, Sep 22, 2016 at 10:14:00AM +0800, Yi Sun wrote:
> Design document is below:
Could the design document be a patch itself please?
Meaning it will be added in docs/misc/ ?
Also is there a git tree for your patches?
Thanks.
___
Xen-devel mailing
On 16-09-23 10:41:45, Wei Liu wrote:
> On Fri, Sep 23, 2016 at 10:06:54AM +0800, Yi Sun wrote:
> > On 16-09-22 11:18:12, Wei Liu wrote:
> > > Hi Yi
> > >
> > > Thanks for submitting this series. I see that all the actual patches
> > > are not chained to 0/3. It would be better if they show up as
On Fri, Sep 23, 2016 at 10:06:54AM +0800, Yi Sun wrote:
> On 16-09-22 11:18:12, Wei Liu wrote:
> > Hi Yi
> >
> > Thanks for submitting this series. I see that all the actual patches
> > are not chained to 0/3. It would be better if they show up as replies to
> > 0/3.
> >
> > The workflow for sen
On 16-09-22 11:18:12, Wei Liu wrote:
> Hi Yi
>
> Thanks for submitting this series. I see that all the actual patches
> are not chained to 0/3. It would be better if they show up as replies to
> 0/3.
>
> The workflow for sending patch series differs from person to person, so
> we don't want to
Hi Yi
Thanks for submitting this series. I see that all the actual patches
are not chained to 0/3. It would be better if they show up as replies to
0/3.
The workflow for sending patch series differs from person to person, so
we don't want to dictate how you use your tool. But we have written a
Design document is below:
===
% Intel L2 Cache Allocation Technology (L2 CAT) Feature
% Revision 2.0
\clearpage
Hi all,
We plan to bring a new PSR (Platform Shared Resource) feature called
Intel L2 Cache Allocation Technology (L
