Re: [Xen-devel] [RFC PATCH 1/7] x86: improve psr scheduling code

2015-04-06 Thread Konrad Rzeszutek Wilk
On Sat, Apr 04, 2015 at 04:14:24AM +0200, Dario Faggioli wrote: > From: Chao Peng > > Switching RMID from previous vcpu to next vcpu only needs to write > MSR_IA32_PSR_ASSOC once. Write it with the value of next vcpu is enough, > no need to write '0' first. Idle domain has RMID set to 0 and becau

[Xen-devel] [RFC PATCH 1/7] x86: improve psr scheduling code

2015-04-03 Thread Dario Faggioli
From: Chao Peng Switching RMID from previous vcpu to next vcpu only needs to write MSR_IA32_PSR_ASSOC once. Write it with the value of next vcpu is enough, no need to write '0' first. Idle domain has RMID set to 0 and because MSR is already updated lazily, so just switch it as it does. Also move