Hi Ian,
On 08/06/2015 12:01, Ian Campbell wrote:
On Fri, 2015-06-05 at 17:35 +0100, Julien Grall wrote:
*/
static void gicv3_enable_sre(void)
{
uint32_t val;
val = READ_SYSREG32(ICC_SRE_EL2);
-val |= GICC_SRE_EL2_SRE | GICC_SRE_EL2_ENEL1;
+val |= GICC_SRE_EL2_SRE;
On Fri, 2015-06-05 at 17:35 +0100, Julien Grall wrote:
> >> */
> >> static void gicv3_enable_sre(void)
> >> {
> >> uint32_t val;
> >>
> >> val = READ_SYSREG32(ICC_SRE_EL2);
> >> -val |= GICC_SRE_EL2_SRE | GICC_SRE_EL2_ENEL1;
> >> +val |= GICC_SRE_EL2_SRE;
> >>
> >> W
On 05/06/15 13:48, Ian Campbell wrote:
> On Fri, 2015-05-08 at 14:29 +0100, Julien Grall wrote:
>> * Modify the GICv3 driver to recognize a such device. I wasn't able
>> to find a register which tell if GICv2 is supported on GICv3. The only
>> way to find it seems to check if the DT node provid
On Fri, 2015-05-08 at 14:29 +0100, Julien Grall wrote:
> * Modify the GICv3 driver to recognize a such device. I wasn't able
> to find a register which tell if GICv2 is supported on GICv3. The only
> way to find it seems to check if the DT node provides GICC and GICV.
I think that's the way...
* Modify the GICv3 driver to recognize a such device. I wasn't able
to find a register which tell if GICv2 is supported on GICv3. The only
way to find it seems to check if the DT node provides GICC and GICV.
* Disable access to ICC_SRE_EL1 to guest using vGICv2
* The LR is slightly different
