On Mon, Sep 28, 2015 at 01:39:34PM +0100, Ross Lagerwall wrote:
> Since commit 191b3f3344ee ("p2m/ept: enable PML in p2m-ept for
> log-dirty"), the A and D bits of EPT paging entries are set
> unconditionally, regardless of whether PML is enabled or not. This
> causes a regression in Xen 4.6 on som
On Mon, Sep 28, 2015 at 10:09 PM, Jan Beulich wrote:
On 28.09.15 at 14:39, wrote:
>> --- a/xen/arch/x86/mm/p2m-ept.c
>> +++ b/xen/arch/x86/mm/p2m-ept.c
>> @@ -34,6 +34,8 @@
>>
>> #include "mm-locks.h"
>>
>> +static bool_t __read_mostly cpu_has_ept_ad;
>
> This should be
> #define cpu_has_ep
On 28/09/15 15:09, Jan Beulich wrote:
On 28.09.15 at 14:39, wrote:
>> --- a/xen/arch/x86/mm/p2m-ept.c
>> +++ b/xen/arch/x86/mm/p2m-ept.c
>> @@ -34,6 +34,8 @@
>>
>> #include "mm-locks.h"
>>
>> +static bool_t __read_mostly cpu_has_ept_ad;
>
> This should be
> #define cpu_has_ept_ad (vmx_e
On 28/09/15 15:03, Jan Beulich wrote:
On 28.09.15 at 14:43, wrote:
>> At 13:39 +0100 on 28 Sep (1443447574), Ross Lagerwall wrote:
>>> @@ -1150,6 +1152,9 @@ int ept_p2m_init(struct p2m_domain *p2m)
>>> p2m->memory_type_changed = ept_memory_type_changed;
>>> p2m->audit_p2m = NULL;
>>
>>> On 28.09.15 at 16:48, wrote:
> On 28/09/15 15:03, Jan Beulich wrote:
> On 28.09.15 at 14:43, wrote:
>>> At 13:39 +0100 on 28 Sep (1443447574), Ross Lagerwall wrote:
@@ -1150,6 +1152,9 @@ int ept_p2m_init(struct p2m_domain *p2m)
p2m->memory_type_changed = ept_memory_type_cha
>>> On 28.09.15 at 14:39, wrote:
> --- a/xen/arch/x86/mm/p2m-ept.c
> +++ b/xen/arch/x86/mm/p2m-ept.c
> @@ -34,6 +34,8 @@
>
> #include "mm-locks.h"
>
> +static bool_t __read_mostly cpu_has_ept_ad;
This should be
#define cpu_has_ept_ad (vmx_ept_vpid_cap & VMX_EPT_AD_BIT)
put next to the respec
>>> On 28.09.15 at 14:43, wrote:
> At 13:39 +0100 on 28 Sep (1443447574), Ross Lagerwall wrote:
>> @@ -1150,6 +1152,9 @@ int ept_p2m_init(struct p2m_domain *p2m)
>> p2m->memory_type_changed = ept_memory_type_changed;
>> p2m->audit_p2m = NULL;
>>
>> +/* Work around Errata AVR41 on A
CC Kai Huang
On Mon, Sep 28, 2015 at 01:39:34PM +0100, Ross Lagerwall wrote:
> Since commit 191b3f3344ee ("p2m/ept: enable PML in p2m-ept for
> log-dirty"), the A and D bits of EPT paging entries are set
> unconditionally, regardless of whether PML is enabled or not. This
> causes a regression in
Hi,
At 13:39 +0100 on 28 Sep (1443447574), Ross Lagerwall wrote:
> Since commit 191b3f3344ee ("p2m/ept: enable PML in p2m-ept for
> log-dirty"), the A and D bits of EPT paging entries are set
> unconditionally, regardless of whether PML is enabled or not. This
> causes a regression in Xen 4.6 on s
Since commit 191b3f3344ee ("p2m/ept: enable PML in p2m-ept for
log-dirty"), the A and D bits of EPT paging entries are set
unconditionally, regardless of whether PML is enabled or not. This
causes a regression in Xen 4.6 on some processors due to Intel Errata
AVR41 -- HVM guests get severe memory c
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