Re: [Xen-devel] [PATCH v7 02/14] x86: improve psr scheduling code

2015-05-10 Thread Chao Peng
On Fri, May 08, 2015 at 11:20:45AM +0100, Jan Beulich wrote: > >>> On 08.05.15 at 10:56, wrote: > > Switching RMID from previous vcpu to next vcpu only needs to write > > MSR_IA32_PSR_ASSOC once. Write it with the value of next vcpu is enough, > > no need to write '0' first. Idle domain has RMID s

Re: [Xen-devel] [PATCH v7 02/14] x86: improve psr scheduling code

2015-05-08 Thread Jan Beulich
>>> On 08.05.15 at 10:56, wrote: > Switching RMID from previous vcpu to next vcpu only needs to write > MSR_IA32_PSR_ASSOC once. Write it with the value of next vcpu is enough, > no need to write '0' first. Idle domain has RMID set to 0 and because MSR > is already updated lazily, so just switch i

[Xen-devel] [PATCH v7 02/14] x86: improve psr scheduling code

2015-05-08 Thread Chao Peng
Switching RMID from previous vcpu to next vcpu only needs to write MSR_IA32_PSR_ASSOC once. Write it with the value of next vcpu is enough, no need to write '0' first. Idle domain has RMID set to 0 and because MSR is already updated lazily, so just switch it as it does. Also move the initializatio