On 07/02/2015 12:21 PM, David Vrabel wrote:
On 02/07/15 15:53, Boris Ostrovsky wrote:
Map shared data structure that will hold CPU registers, VPMU context,
V/PCPU IDs of the CPU interrupted by PMU interrupt. Hypervisor fills
this information in its handler and passes it to the guest for further
On 02/07/15 15:53, Boris Ostrovsky wrote:
> Map shared data structure that will hold CPU registers, VPMU context,
> V/PCPU IDs of the CPU interrupted by PMU interrupt. Hypervisor fills
> this information in its handler and passes it to the guest for further
> processing.
>
> Set up PMU VIRQ.
>
>
Map shared data structure that will hold CPU registers, VPMU context,
V/PCPU IDs of the CPU interrupted by PMU interrupt. Hypervisor fills
this information in its handler and passes it to the guest for further
processing.
Set up PMU VIRQ.
Now that perf infrastructure will assume that PMU is avail
