On 04/08/2015 07:55, Vijay Kilari wrote:
What would happen if the LPI is injected before the GICR_PROPBASER is
enabled? See for more details on the problem here [1]
Check is required before accessing LPI property table if property
table is available
or not?.
You didn't answer to my questio
On Mon, Aug 3, 2015 at 7:28 PM, Julien Grall wrote:
> On 03/08/15 14:51, Vijay Kilari wrote:
>>> If so, this is wrong for 2 reasons:
>>> 1) The guest may decide to setup a bigger property table later.
>>> 2) vgic.id_bits should never be touched. The GITS_TYPER is static
>>> and
>>
On 03/08/15 14:51, Vijay Kilari wrote:
>> If so, this is wrong for 2 reasons:
>> 1) The guest may decide to setup a bigger property table later.
>> 2) vgic.id_bits should never be touched. The GITS_TYPER is static and
>> defined before the guest is booted.
>
> If GICR_PROPBASER.id
Hi Julien,
On Mon, Aug 3, 2015 at 6:31 PM, Julien Grall wrote:
> Hi Vijay,
>
> On 03/08/15 10:36, Vijay Kilari wrote:
>> On Sat, Aug 1, 2015 at 9:21 PM, Julien Grall wrote:
>>> On 01/08/2015 11:25, Vijay Kilari wrote:
>
> I guess you mean vgic_enable_irqs? And no what you've implemented
Hi Vijay,
On 03/08/15 10:36, Vijay Kilari wrote:
> On Sat, Aug 1, 2015 at 9:21 PM, Julien Grall wrote:
>> On 01/08/2015 11:25, Vijay Kilari wrote:
I guess you mean vgic_enable_irqs? And no what you've implemented is
definitely not the same as vgic_enable_irqs.
vgic_enable
On Sat, Aug 1, 2015 at 9:21 PM, Julien Grall wrote:
> Hi Vijay,
>
> On 01/08/2015 11:25, Vijay Kilari wrote:
>>>
>>> I guess you mean vgic_enable_irqs? And no what you've implemented is
>>> definitely not the same as vgic_enable_irqs.
>>>
>>> vgic_enable_irqs is locking the pending_irq structure u
Hi Vijay,
On 01/08/2015 11:25, Vijay Kilari wrote:
I guess you mean vgic_enable_irqs? And no what you've implemented is
definitely not the same as vgic_enable_irqs.
vgic_enable_irqs is locking the pending_irq structure using the vgic
lock of the targeting VCPU (see v_target = ... ->get_target_c
On Fri, Jul 31, 2015 at 4:35 PM, Julien Grall wrote:
> On 31/07/15 10:08, Vijay Kilari wrote:
>> On Thu, Jul 30, 2015 at 10:34 PM, Julien Grall
>> wrote:
>>> Hi Vijay,
[...]
+static void vits_disable_lpi(struct vcpu *v, uint32_t vlpi)
+{
+struct pending_irq *p;
+
+
On 31/07/15 10:08, Vijay Kilari wrote:
> On Thu, Jul 30, 2015 at 10:34 PM, Julien Grall
> wrote:
>> Hi Vijay,
>>
>> On 27/07/15 12:11, vijay.kil...@gmail.com wrote:
>>> diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
>>
>> [..]
>>
>>> +static int gicv3_dist_supports_lpis(void)
>>> +{
>
On Thu, Jul 30, 2015 at 10:34 PM, Julien Grall wrote:
> Hi Vijay,
>
> On 27/07/15 12:11, vijay.kil...@gmail.com wrote:
>> diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
>
> [..]
>
>> +static int gicv3_dist_supports_lpis(void)
>> +{
>> +return readl_relaxed(GICD + GICD_TYPER) & GICD
Hi Vijay,
On 27/07/15 12:11, vijay.kil...@gmail.com wrote:
> diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
[..]
> +static int gicv3_dist_supports_lpis(void)
> +{
> +return readl_relaxed(GICD + GICD_TYPER) & GICD_TYPER_LPIS_SUPPORTED;
> +}
> +
> static int __cpuinit gicv3_cpu_in
From: Vijaya Kumar K
Emulate LPI related changes to GICR registers
Signed-off-by: Vijaya Kumar K
---
v5: - Handled all sizes access to LPI configuration table
- Rename vits_unmap_lpi_prop as vits_map_lpi_prop
v4: - Added LPI configuration table emulation
- Rename function inline with v
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