On Wed, Aug 09, 2017 at 02:21:33AM -0600, Jan Beulich wrote:
> >>> On 08.08.17 at 17:44, wrote:
> > On Wed, Aug 02, 2017 at 07:34:28AM -0600, Jan Beulich wrote:
> >> >>> Roger Pau Monne 06/30/17 5:01 PM >>>
> >> >+/* Get a PIRQ. */
> >> >+rc = allocate_and_map_msi_pirq(pdev->domain, -1, &
>>> On 08.08.17 at 17:44, wrote:
> On Wed, Aug 02, 2017 at 07:34:28AM -0600, Jan Beulich wrote:
>> >>> Roger Pau Monne 06/30/17 5:01 PM >>>
>> >+/* Get a PIRQ. */
>> >+rc = allocate_and_map_msi_pirq(pdev->domain, -1, &arch->pirq,
>> >+ MAP_PIRQ_TYPE_MULTI
On Wed, Aug 02, 2017 at 07:34:28AM -0600, Jan Beulich wrote:
> >>> Roger Pau Monne 06/30/17 5:01 PM >>>
> >+int vpci_msi_arch_enable(struct vpci_arch_msi *arch, struct pci_dev *pdev,
> >+ uint64_t address, uint32_t data, unsigned int
> >vectors)
> >+{
> >+struct msi_in
>>> Roger Pau Monne 06/30/17 5:01 PM >>>
>Add handlers for the MSI control, address, data and mask fields in
>order to detect accesses to them and setup the interrupts as requested
>by the guest.
>
>Note that the pending register is not trapped, and the guest can
>freely read/write to it.
>
>Wheth
> -Original Message-
> From: Roger Pau Monne [mailto:roger@citrix.com]
> Sent: 30 June 2017 16:01
> To: xen-de...@lists.xenproject.org
> Cc: boris.ostrov...@oracle.com; julien.gr...@arm.com;
> konrad.w...@oracle.com; Roger Pau Monne ; Jan
> Beulich ; Andrew Cooper
> ; Paul Durrant
> Su
Add handlers for the MSI control, address, data and mask fields in
order to detect accesses to them and setup the interrupts as requested
by the guest.
Note that the pending register is not trapped, and the guest can
freely read/write to it.
Whether Xen is going to provide this functionality to D
