Re: [Xen-devel] [PATCH v4 12/17] x86emul: support SSE4.1 insns

2017-03-02 Thread Jan Beulich
>>> On 01.03.17 at 17:58, wrote: > On 28/02/17 12:56, Jan Beulich wrote: >> @@ -6951,6 +7040,97 @@ x86_emulate( >> fic.insn_bytes = PFX_BYTES + 3; >> break; >> >> +case X86EMUL_OPC_66(0x0f38, 0x20): /* pmovsxbw xmm/m64,xmm */ >> +case X86EMUL_OPC_66(0x0f38, 0x21): /* pm

Re: [Xen-devel] [PATCH v4 12/17] x86emul: support SSE4.1 insns

2017-03-01 Thread Andrew Cooper
On 28/02/17 12:56, Jan Beulich wrote: > @@ -6951,6 +7040,97 @@ x86_emulate( > fic.insn_bytes = PFX_BYTES + 3; > break; > > +case X86EMUL_OPC_66(0x0f38, 0x20): /* pmovsxbw xmm/m64,xmm */ > +case X86EMUL_OPC_66(0x0f38, 0x21): /* pmovsxbd xmm/m32,xmm */ > +case X86EMUL_

[Xen-devel] [PATCH v4 12/17] x86emul: support SSE4.1 insns

2017-02-28 Thread Jan Beulich
... and their AVX equivalents. Signed-off-by: Jan Beulich --- v4: Or in ByteOp for {,v}pinsrb instead of assigning it (in x86_decode_0f3a()). Correct case label for ptest. Add missing copy_REX_VEX() to {,v}ptest handling. Add missing immediate bytes to {,v}pextr* etc handling. dppd re