Hi Andre,
Yeah... another round repeating the same things.
On 04/03/2017 09:28 PM, Andre Przywara wrote:
diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c
new file mode 100644
index 000..a003a72
--- /dev/null
+++ b/xen/arch/arm/gic-v3-lpi.c
[...]
+#include
+#include
+
The ARM GICv3 provides a new kind of interrupt called LPIs.
The pending bits and the configuration data (priority, enable bits) for
those LPIs are stored in tables in normal memory, which software has to
provide to the hardware.
Allocate the required memory, initialize it and hand it over to each
r
