Re: [Xen-devel] [PATCH v3 for-next 3/3] x86/vioapic: bind interrupts to PVH Dom0

2017-06-01 Thread Jan Beulich
>>> On 31.05.17 at 16:48, wrote: > On Tue, May 30, 2017 at 04:05:39AM -0600, Jan Beulich wrote: >> >>> On 17.05.17 at 17:15, wrote: >> > Changes since v2: >> > - s/vioapic_dom0_map_gsi/vioapic_hwdom_map_gsi/. >> > - Don't set hvm_domid in xen_domctl_bind_pt_irq_t (it's ignored). >> >> The impl

Re: [Xen-devel] [PATCH v3 for-next 3/3] x86/vioapic: bind interrupts to PVH Dom0

2017-05-31 Thread Roger Pau Monne
On Tue, May 30, 2017 at 04:05:39AM -0600, Jan Beulich wrote: > >>> On 17.05.17 at 17:15, wrote: > > Changes since v2: > > - s/vioapic_dom0_map_gsi/vioapic_hwdom_map_gsi/. > > - Don't set hvm_domid in xen_domctl_bind_pt_irq_t (it's ignored). > > The implication of the respective earlier comment

Re: [Xen-devel] [PATCH v3 for-next 3/3] x86/vioapic: bind interrupts to PVH Dom0

2017-05-30 Thread Jan Beulich
>>> On 17.05.17 at 17:15, wrote: > Changes since v2: > - s/vioapic_dom0_map_gsi/vioapic_hwdom_map_gsi/. > - Don't set hvm_domid in xen_domctl_bind_pt_irq_t (it's ignored). The implication of the respective earlier comment was for there to first be a prereq patch added removing this dead field.

[Xen-devel] [PATCH v3 for-next 3/3] x86/vioapic: bind interrupts to PVH Dom0

2017-05-17 Thread Roger Pau Monne
Add the glue in order to bind the PVH Dom0 GSI from bare metal. This is done when Dom0 unmasks the vIO APIC pins, by fetching the current pin settings and setting up the PIRQ, which will then be bound to Dom0. Signed-off-by: Roger Pau Monné --- Cc: Jan Beulich Cc: Andrew Cooper --- Changes sinc