Re: [Xen-devel] [PATCH v3 2/8] x86: improve psr scheduling code

2015-03-27 Thread Andrew Cooper
On 26/03/15 12:38, Chao Peng wrote: > Switching RMID from previous vcpu to next vcpu only needs to write > MSR_IA32_PSR_ASSOC once. Write it with the value of next vcpu is enough, > no need to write '0' first. Idle domain has RMID set to 0 and because MSR > is already updated lazily, so just switch

[Xen-devel] [PATCH v3 2/8] x86: improve psr scheduling code

2015-03-26 Thread Chao Peng
Switching RMID from previous vcpu to next vcpu only needs to write MSR_IA32_PSR_ASSOC once. Write it with the value of next vcpu is enough, no need to write '0' first. Idle domain has RMID set to 0 and because MSR is already updated lazily, so just switch it as it does. Also move the initializatio