Hi Andrew,
On 1/2/17 23:37, Andrew Cooper wrote:
+ma = d->avic_phy_apic_id_table_mfn;
+vmcb->avic_phy_apic_id = (ma << PAGE_SHIFT) & AVIC_HPA_MASK;
+vmcb->avic_phy_apic_id |= AVIC_PHY_APIC_ID_MAX;
Surely this should be some calculation derived from d->max_vcpus?
This is actually s
On 04/01/17 17:24, Suravee Suthikulpanit wrote:
> On 1/2/17 23:37, Andrew Cooper wrote:
>>> +
>>> +vmcb->avic_bk_pg_pa = page_to_maddr(vlapic->regs_page) &
>>> AVIC_HPA_MASK;
>>
>> This use of AVIC_HPA_MASK may truncate the the address, which is
>> definitely a problem.
>
> I'm not quite sure t
Hi Andrew
On 1/2/17 23:37, Andrew Cooper wrote:
On 31/12/2016 05:45, Suravee Suthikulpanit wrote:
[...]
+/*
+ * Note: Current max index allowed for physical APIC ID table is 255.
+ */
+#define AVIC_PHY_APIC_ID_MAX0xFF
+
+#define AVIC_DOORBELL 0xc001011b
+
+#define AVIC_HPA_SHIFT
> +
> +#define AVIC_DOORBELL 0xc001011b
MSR_AVIC_DOORBELL (and it should probably go to include/asm-x86/msr-index.h)
> +
> +#define AVIC_HPA_SHIFT 12
Is there a reason not to use regular PAGE_SHIFT?
> +#define AVIC_HPA_MASK (((1ULL << 40) - 1) << AVIC_HPA_SHIFT)
> +#define
On 31/12/2016 05:45, Suravee Suthikulpanit wrote:
> diff --git a/xen/arch/x86/hvm/svm/avic.c b/xen/arch/x86/hvm/svm/avic.c
> new file mode 100644
> index 000..b62f982
> --- /dev/null
> +++ b/xen/arch/x86/hvm/svm/avic.c
> @@ -0,0 +1,232 @@
> +/*
> + * avic.c: implements AMD Advance Virtual Inter
Introduce AVIC base initialization code. This includes:
* Setting up per-VM data structures.
* Setting up per-vCPU data structure.
* Initializing AVIC-related VMCB bit fields.
This patch also introduces a new Xen parameter (svm-avic),
which can be used to enable/disable AVIC support.
C
