On Fri, 24 Mar 2017, Julien Grall wrote:
> Hi Andre,
>
> On 03/23/2017 06:21 PM, Andre Przywara wrote:
> > Hi,
> >
> > On 23/03/17 18:01, Stefano Stabellini wrote:
> > > On Thu, 23 Mar 2017, Julien Grall wrote:
> > > > Hi Stefano,
> > > >
> > > > On 23/03/17 17:45, Stefano Stabellini wrote:
> >
Hi Andre,
On 03/23/2017 06:21 PM, Andre Przywara wrote:
Hi,
On 23/03/17 18:01, Stefano Stabellini wrote:
On Thu, 23 Mar 2017, Julien Grall wrote:
Hi Stefano,
On 23/03/17 17:45, Stefano Stabellini wrote:
On Thu, 23 Mar 2017, Julien Grall wrote:
So as I mentioned before, I am happy to loose
Hi,
On 23/03/17 18:01, Stefano Stabellini wrote:
> On Thu, 23 Mar 2017, Julien Grall wrote:
>> Hi Stefano,
>>
>> On 23/03/17 17:45, Stefano Stabellini wrote:
>>> On Thu, 23 Mar 2017, Julien Grall wrote:
> So as I mentioned before, I am happy to loose the Kconfig option, but
> then we need
On Thu, 23 Mar 2017, Julien Grall wrote:
> Hi Stefano,
>
> On 23/03/17 17:45, Stefano Stabellini wrote:
> > On Thu, 23 Mar 2017, Julien Grall wrote:
> > > > So as I mentioned before, I am happy to loose the Kconfig option, but
> > > > then we need some sensible default value. In our case we could
Hi Stefano,
On 23/03/17 17:45, Stefano Stabellini wrote:
On Thu, 23 Mar 2017, Julien Grall wrote:
So as I mentioned before, I am happy to loose the Kconfig option, but
then we need some sensible default value. In our case we could be cheeky
here for now and just use the Linux value, because a L
On 23/03/17 10:50, Andre Przywara wrote:
Hi,
Hi Andre,
On 21/03/17 23:27, Stefano Stabellini wrote:
On Tue, 21 Mar 2017, André Przywara wrote:
On 21/03/17 22:57, Stefano Stabellini wrote:
On Thu, 16 Mar 2017, Andre Przywara wrote:
The ARM GICv3 provides a new kind of interrupt called LP
On Thu, 23 Mar 2017, Julien Grall wrote:
> On 23/03/17 14:40, Andre Przywara wrote:
> > Hi,
>
> Hi Andre,
>
> >
> > On 21/03/17 21:23, Julien Grall wrote:
> > > Hi Andre,
> > >
> > > On 03/16/2017 11:20 AM, Andre Przywara wrote:
> > > > diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
>
On 23/03/17 14:40, Andre Przywara wrote:
Hi,
Hi Andre,
On 21/03/17 21:23, Julien Grall wrote:
Hi Andre,
On 03/16/2017 11:20 AM, Andre Przywara wrote:
diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index bf64c61..86f7b53 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kcon
Hi,
On 21/03/17 21:23, Julien Grall wrote:
> Hi Andre,
>
> On 03/16/2017 11:20 AM, Andre Przywara wrote:
>> diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
>> index bf64c61..86f7b53 100644
>> --- a/xen/arch/arm/Kconfig
>> +++ b/xen/arch/arm/Kconfig
>> @@ -49,6 +49,21 @@ config HAS_ITS
>>
Hi,
On 21/03/17 23:27, Stefano Stabellini wrote:
> On Tue, 21 Mar 2017, André Przywara wrote:
>> On 21/03/17 22:57, Stefano Stabellini wrote:
>>> On Thu, 16 Mar 2017, Andre Przywara wrote:
The ARM GICv3 provides a new kind of interrupt called LPIs.
The pending bits and the configuration
Hi Andre,
On 03/16/2017 11:20 AM, Andre Przywara wrote:
diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index bf64c61..86f7b53 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -49,6 +49,21 @@ config HAS_ITS
bool "GICv3 ITS MSI controller support"
depends
On Tue, 21 Mar 2017, André Przywara wrote:
> On 21/03/17 22:57, Stefano Stabellini wrote:
> > On Thu, 16 Mar 2017, Andre Przywara wrote:
> >> The ARM GICv3 provides a new kind of interrupt called LPIs.
> >> The pending bits and the configuration data (priority, enable bits) for
> >> those LPIs are
On 21/03/17 22:57, Stefano Stabellini wrote:
> On Thu, 16 Mar 2017, Andre Przywara wrote:
>> The ARM GICv3 provides a new kind of interrupt called LPIs.
>> The pending bits and the configuration data (priority, enable bits) for
>> those LPIs are stored in tables in normal memory, which software has
On Thu, 16 Mar 2017, Andre Przywara wrote:
> The ARM GICv3 provides a new kind of interrupt called LPIs.
> The pending bits and the configuration data (priority, enable bits) for
> those LPIs are stored in tables in normal memory, which software has to
> provide to the hardware.
> Allocate the requ
The ARM GICv3 provides a new kind of interrupt called LPIs.
The pending bits and the configuration data (priority, enable bits) for
those LPIs are stored in tables in normal memory, which software has to
provide to the hardware.
Allocate the required memory, initialize it and hand it over to each
r
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