On 29/09/15 14:13, Ian Campbell wrote:
> On Tue, 2015-09-29 at 12:13 +0100, Julien Grall wrote:
>>> Or is it, couldn't we be updating a byte in the middle of the word?
>>
>> *r is a register, the byte/half-word/word... are always living in the
>> lowest bit of the register.
>
> So just to check:
>
On Tue, 2015-09-29 at 12:13 +0100, Julien Grall wrote:
> > Or is it, couldn't we be updating a byte in the middle of the word?
>
> *r is a register, the byte/half-word/word... are always living in the
> lowest bit of the register.
So just to check:
ldrs* do support e.g odd offsets, but given a 3
On 29/09/15 12:03, Ian Campbell wrote:
> On Mon, 2015-09-28 at 19:22 +0100, Julien Grall wrote:
>> On 25/09/15 17:44, Ian Campbell wrote:
>>> On Fri, 2015-09-25 at 15:51 +0100, Julien Grall wrote:
>>> I think you meant s/bit sign/sign bit/ but more correct would be "Sign
>>> extend if required".
>>
On 29/09/15 12:01, Ian Campbell wrote:
> On Mon, 2015-09-28 at 17:42 +0100, Julien Grall wrote:
>
+ */
+if ( info->dabt.sign && (*r & (1UL << (size - 1)) ))
+{
+/*
+ * We are relying on register_t as the same size as
+ * an unsigned
On Mon, 2015-09-28 at 19:22 +0100, Julien Grall wrote:
> On 25/09/15 17:44, Ian Campbell wrote:
> > On Fri, 2015-09-25 at 15:51 +0100, Julien Grall wrote:
> > I think you meant s/bit sign/sign bit/ but more correct would be "Sign
> > extend if required".
> >
> > > + * Note that we expect the r
On Mon, 2015-09-28 at 17:42 +0100, Julien Grall wrote:
> > > + */
> > > +if ( info->dabt.sign && (*r & (1UL << (size - 1)) ))
> > > +{
> > > +/*
> > > + * We are relying on register_t as the same size as
> > > + * an unsigned long or order to keep the 32bit some
On 25/09/15 17:44, Ian Campbell wrote:
> On Fri, 2015-09-25 at 15:51 +0100, Julien Grall wrote:
> I think you meant s/bit sign/sign bit/ but more correct would be "Sign
> extend if required".
>
>> + * Note that we expect the read handler to have zeroed the bit
>> + * unused in the register
On 25/09/15 17:44, Ian Campbell wrote:
>> diff --git a/xen/arch/arm/io.c b/xen/arch/arm/io.c
>> index 32b2194..e1b03a2 100644
>> --- a/xen/arch/arm/io.c
>> +++ b/xen/arch/arm/io.c
>> @@ -23,6 +23,32 @@
>> #include
>> #include
>>
>> +static int handle_read(mmio_read_t read_cb, struct vcpu *v,
On Fri, 2015-09-25 at 15:51 +0100, Julien Grall wrote:
> The guest may try to load data from the emulated MMIO region using
> instruction with Sign-Extension (i.e ldrs*). This can happen for any
> access smaller than the register size (byte/half-word for aarch32,
> byte/half-word/word for aarch64).
The guest may try to load data from the emulated MMIO region using
instruction with Sign-Extension (i.e ldrs*). This can happen for any
access smaller than the register size (byte/half-word for aarch32,
byte/half-word/word for aarch64).
The support of sign-extension was limited for byte access in
The guest may try to load data from the emulated MMIO region using
instruction with Sign-Extension (i.e ldrs*). This can happen for any
access smaller than the register size (byte/half-word for aarch32,
byte/half-word/word for aarch64).
The support of sign-extension was limited for byte access in
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