Re: [Xen-devel] [PATCH 5/7] x86/mce: clear MSR_IA32_MCG_STATUS by writing 0

2017-02-24 Thread Jan Beulich
>>> On 24.02.17 at 11:52, wrote: > On Intel CPU, an attemp to write to MSR_IA32_MCG_STATUS with any > non-zero value would result in #GP. > > This commit writes 0 on AMD CPU as well instead of just clearing MCIP > bit, because all non-reserved bits of MSR_IA32_MCG_STATUS have been > handled at th

Re: [Xen-devel] [PATCH 5/7] x86/mce: clear MSR_IA32_MCG_STATUS by writing 0

2017-02-24 Thread Boris Ostrovsky
On 02/24/2017 05:52 AM, Haozhong Zhang wrote: > On Intel CPU, an attemp to write to MSR_IA32_MCG_STATUS with any > non-zero value would result in #GP. > > This commit writes 0 on AMD CPU as well instead of just clearing MCIP > bit, because all non-reserved bits of MSR_IA32_MCG_STATUS have been > ha

[Xen-devel] [PATCH 5/7] x86/mce: clear MSR_IA32_MCG_STATUS by writing 0

2017-02-24 Thread Haozhong Zhang
On Intel CPU, an attemp to write to MSR_IA32_MCG_STATUS with any non-zero value would result in #GP. This commit writes 0 on AMD CPU as well instead of just clearing MCIP bit, because all non-reserved bits of MSR_IA32_MCG_STATUS have been handled at this point. Signed-off-by: Haozhong Zhang ---