>>> On 11.03.16 at 03:31, wrote:
> On Wed, Mar 09, 2016 at 10:01:08AM -0700, Jan Beulich wrote:
>> >>> On 09.03.16 at 17:52, wrote:
>> > On Tue, Mar 08, 2016 at 01:48:05AM -0700, Jan Beulich wrote:
>> >> >>> On 07.03.16 at 23:04, wrote:
>> >> > Hmm, if it was some other PCI based serial card lik
On Wed, Mar 09, 2016 at 10:01:08AM -0700, Jan Beulich wrote:
> >>> On 09.03.16 at 17:52, wrote:
> > On Tue, Mar 08, 2016 at 01:48:05AM -0700, Jan Beulich wrote:
> >> >>> On 07.03.16 at 23:04, wrote:
> >> > Hmm, if it was some other PCI based serial card like:
> >> >
> >> > 01:05.0 Serial control
>>> On 09.03.16 at 17:52, wrote:
> On Tue, Mar 08, 2016 at 01:48:05AM -0700, Jan Beulich wrote:
>> >>> On 07.03.16 at 23:04, wrote:
>> > Hmm, if it was some other PCI based serial card like:
>> >
>> > 01:05.0 Serial controller: NetMos Technology PCI 9835 Multi-I/O
>> > Controller (rev 01) (prog-
On Tue, Mar 08, 2016 at 01:48:05AM -0700, Jan Beulich wrote:
> >>> On 07.03.16 at 23:04, wrote:
> >> +[param_pericom_4port] = {
> >> +.base_baud = 921600,
> >> +.uart_offset = 8,
> >> +.reg_width = 1,
> >> +.fifo_size = 16,
> >> +.lsr_mask = UART_LSR_TH
>>> On 07.03.16 at 23:04, wrote:
>> +[param_pericom_4port] = {
>> +.base_baud = 921600,
>> +.uart_offset = 8,
>> +.reg_width = 1,
>> +.fifo_size = 16,
>> +.lsr_mask = UART_LSR_THRE,
>> +.bar0 = 1,
>> +.max_ports = 4,
>> +},
>> +[
> +[param_pericom_4port] = {
> +.base_baud = 921600,
> +.uart_offset = 8,
> +.reg_width = 1,
> +.fifo_size = 16,
> +.lsr_mask = UART_LSR_THRE,
> +.bar0 = 1,
> +.max_ports = 4,
> +},
> +[param_pericom_8port] = {
> +.base_bau
Other than the controllers supported so far, multiple port Pericom
boards map all of their ports via BAR0, which requires a number of
adjustments: Instead of tracking "max_bars" we now flag whether all
ports use BAR0, and whether to expect a port-I/O or MMIO resource. As
a result pci_uart_config()
