> -Original Message-
> From: Andrew Cooper [mailto:andrew.coop...@citrix.com]
> Sent: 27 February 2017 14:03
> To: Xen-devel
> Cc: Andrew Cooper ; Jan Beulich
> ; Paul Durrant ; George
> Dunlap ; Tim (Xen.org)
> Subject: [PATCH 1/7] x86/hvm: Correctly identify implicit supervisor accesses
On 27/02/17 14:03, Andrew Cooper wrote:
> All actions which refer to the active ldt/gdt/idt or task register
> (e.g. loading a new segment selector) are known as implicit supervisor
> accesses, even when the access originates from user code.
It turns out that this has a bugfix in it which I hadn't
On 27/02/17 14:03, Andrew Cooper wrote:
> All actions which refer to the active ldt/gdt/idt or task register
> (e.g. loading a new segment selector) are known as implicit supervisor
> accesses, even when the access originates from user code.
>
> The distinction is necessary in the pagewalk when SM
At 14:03 + on 27 Feb (1488204192), Andrew Cooper wrote:
> All actions which refer to the active ldt/gdt/idt or task register
> (e.g. loading a new segment selector) are known as implicit supervisor
> accesses, even when the access originates from user code.
>
> The distinction is necessary in
>>> On 27.02.17 at 15:03, wrote:
> --- a/xen/include/asm-x86/processor.h
> +++ b/xen/include/asm-x86/processor.h
> @@ -76,6 +76,7 @@
> /* Internally used only flags. */
> #define PFEC_page_paged (1U<<16)
> #define PFEC_page_shared(1U<<17)
> +#define PFEC_implicit (1U<<18) /* Pagew
All actions which refer to the active ldt/gdt/idt or task register
(e.g. loading a new segment selector) are known as implicit supervisor
accesses, even when the access originates from user code.
The distinction is necessary in the pagewalk when SMAP is enabled. Refer to
Intel SDM Vol 3 "Access R
