>>> On 10.02.16 at 18:51, wrote:
> On 10/02/16 15:37, Jan Beulich wrote:
> On 10.02.16 at 16:00, wrote:
>>> On 10/02/16 12:56, Jan Beulich wrote:
Since CLFLUSH, other than WBINVD, is a coherency domain wide flush,
>>> I can't parse this sentence.
>> Should have been "..., is a cache cohe
On 10/02/16 15:37, Jan Beulich wrote:
On 10.02.16 at 16:00, wrote:
>> On 10/02/16 12:56, Jan Beulich wrote:
>>> Since CLFLUSH, other than WBINVD, is a coherency domain wide flush,
>> I can't parse this sentence.
> Should have been "..., is a cache coherency domain wide flush, ..." -
> does it
>>> On 10.02.16 at 16:00, wrote:
> On 10/02/16 12:56, Jan Beulich wrote:
>> Since CLFLUSH, other than WBINVD, is a coherency domain wide flush,
>
> I can't parse this sentence.
Should have been "..., is a cache coherency domain wide flush, ..." -
does it read any better then?
> CLFUSH states "I
On 10/02/16 12:56, Jan Beulich wrote:
> Since CLFLUSH, other than WBINVD, is a coherency domain wide flush,
I can't parse this sentence.
CLFUSH states "Invalidates from every level of the cache hierarchy in
the cache coherence domain"
WBINVD however states "The instruction then issues a special-
Since CLFLUSH, other than WBINVD, is a coherency domain wide flush,
there's no need to IPI other CPUs if this is the only flushing being
requested. (As a secondary change, move a local variable into the scope
where it's actually needed.)
Signed-off-by: Jan Beulich
--- a/xen/arch/x86/flushtlb.c
+
