On 04/21/2017 02:31 AM, Jan Beulich wrote:
On 20.04.17 at 22:40, wrote:
--- a/arch/x86/include/arch/msr-index.h
+++ b/arch/x86/include/arch/msr-index.h
@@ -38,6 +38,17 @@
#define MSR_GS_BASE 0xc101
#define MSR_SHADOW_GS_BASE 0xc102
+#define MSR_
>>> On 20.04.17 at 22:40, wrote:
> --- a/arch/x86/include/arch/msr-index.h
> +++ b/arch/x86/include/arch/msr-index.h
> @@ -38,6 +38,17 @@
> #define MSR_GS_BASE 0xc101
> #define MSR_SHADOW_GS_BASE 0xc102
>
> +#define MSR_IA32_PMC(n) (0x00
This patch adds Intel PMU MSR addresses as macros for VPMU testing
Signed-off-by: Mohit Gambhir
---
arch/x86/include/arch/msr-index.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/x86/include/arch/msr-index.h
b/arch/x86/include/arch/msr-index.h
index 2e90079..7df9097 100