Re: [Xen-devel] [PATCH 04/17] x86emul: support F16C insns

2017-09-14 Thread Jan Beulich
>>> On 14.09.17 at 11:13, wrote: > I see now -- you're using a construct that is common all over the code. > > I think the construct could probably use changing, but currently for > readability it's probably better to follow suit. Perhaps, though at the time I couldn't think of anything that wou

Re: [Xen-devel] [PATCH 04/17] x86emul: support F16C insns

2017-09-14 Thread George Dunlap
On Wed, Sep 13, 2017 at 6:10 PM, George Dunlap wrote: > On Wed, Jun 21, 2017 at 1:01 PM, Jan Beulich wrote: >> Note that this avoids emulating the behavior of VCVTPS2PH found on at >> least some Intel CPUs, which update MXCSR even when the memory write >> faults. >> >> Signed-off-by: Jan Beulich

Re: [Xen-devel] [PATCH 04/17] x86emul: support F16C insns

2017-09-13 Thread George Dunlap
On Wed, Jun 21, 2017 at 1:01 PM, Jan Beulich wrote: > Note that this avoids emulating the behavior of VCVTPS2PH found on at > least some Intel CPUs, which update MXCSR even when the memory write > faults. > > Signed-off-by: Jan Beulich > > --- a/tools/tests/x86_emulator/test_x86_emulator.c > +++

[Xen-devel] [PATCH 04/17] x86emul: support F16C insns

2017-06-21 Thread Jan Beulich
Note that this avoids emulating the behavior of VCVTPS2PH found on at least some Intel CPUs, which update MXCSR even when the memory write faults. Signed-off-by: Jan Beulich --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -3028,6 +3028,47