On 30/01/17 18:31, Andre Przywara wrote:
Hi,
Hi Andre,
Compared to the previous post (RFC-v2) this has seen a lot of reworks
and cleanups in various areas.
I tried to address all of the review comments, though some are hard to
follow due to rewrites. So apologies if some points have slipped t
Hi Vijay,
On 13/02/17 13:53, Vijay Kilari wrote:
> I tried your patch series on HW. Dom0 boots but no LPIs are coming to Dom0.
> So I made below patch to consider segment ID in generating devid,
> I see below panic from _xmalloc().
I found the root cause of this bug. The size of the ITT entry
On Mon, 13 Feb 2017, Vijay Kilari wrote:
> Hi Andre,
>
> I tried your patch series on HW. Dom0 boots but no LPIs are coming to Dom0.
> So I made below patch to consider segment ID in generating devid,
> I see below panic from _xmalloc().
>
> Complete log is here
> http://pastebin.com/btythn2V
Hi Andre,
I tried your patch series on HW. Dom0 boots but no LPIs are coming to Dom0.
So I made below patch to consider segment ID in generating devid,
I see below panic from _xmalloc().
Complete log is here
http://pastebin.com/btythn2V
diff --git a/xen/arch/arm/physdev.c b/xen/arch/arm/physd
Hi,
after the two RFC versions now the first "serious" attempt for emulating
an ARM GICv3 ITS interrupt controller, for Dom0 only at the moment.
The ITS is an interrupt controller widget providing a sophisticated way
of dealing with MSIs in a scalable manner.
For hardware which relies on the ITS t
