> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: Wednesday, August 03, 2016 4:38 PM
>
> ... as per the June 2016 edition of the SDM.
>
> Also remove a couple of dead break statements as well as unused
> *MSR_PM_LASTBRANCH* #define-s.
>
> Signed-off-by: Jan Beulich
Acked-by: Kevin Tian
On 03/08/16 09:38, Jan Beulich wrote:
> ... as per the June 2016 edition of the SDM.
>
> Also remove a couple of dead break statements as well as unused
> *MSR_PM_LASTBRANCH* #define-s.
>
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
___
Xen-de
... as per the June 2016 edition of the SDM.
Also remove a couple of dead break statements as well as unused
*MSR_PM_LASTBRANCH* #define-s.
Signed-off-by: Jan Beulich
--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -61,14 +61,14 @@
#define GET_HW_RES_IN_NS(msr, val)
> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: Monday, March 23, 2015 11:44 PM
>
> This just follows what the January 2015 edition of the SDM documents,
> with additional clarification from Intel:
> - Broadwell models 0x4f and 0x56 don't cross-reference other tables,
> but should be trea
This just follows what the January 2015 edition of the SDM documents,
with additional clarification from Intel:
- Broadwell models 0x4f and 0x56 don't cross-reference other tables,
but should be treated like other Boradwell (0x3d),
- Xeon Phi model 0x57 lists LASTBRANCH_TOS but not where the actu
