>>> On 31.05.17 at 13:34, wrote:
> On Wed, May 31, 2017 at 03:15:28AM -0600, Jan Beulich wrote:
> On 31.05.17 at 10:56, wrote:
>>> On Wed, May 31, 2017 at 02:06:50AM -0600, Jan Beulich wrote:
>>> On 31.05.17 at 09:46, wrote:
> --- a/xen/arch/x86/hvm/vlapic.c
> +++ b/xen/arch/x86/
On Wed, May 31, 2017 at 03:15:28AM -0600, Jan Beulich wrote:
On 31.05.17 at 10:56, wrote:
>> On Wed, May 31, 2017 at 02:06:50AM -0600, Jan Beulich wrote:
>> On 31.05.17 at 09:46, wrote:
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -1003,14 +1003,12 @@
>>> On 31.05.17 at 10:56, wrote:
> On Wed, May 31, 2017 at 02:06:50AM -0600, Jan Beulich wrote:
> On 31.05.17 at 09:46, wrote:
>>> --- a/xen/arch/x86/hvm/vlapic.c
>>> +++ b/xen/arch/x86/hvm/vlapic.c
>>> @@ -1003,14 +1003,12 @@ bool_t vlapic_msr_set(struct vlapic *vlapic,
>>> uint64_t value)
On Wed, May 31, 2017 at 02:06:50AM -0600, Jan Beulich wrote:
On 31.05.17 at 09:46, wrote:
>> --- a/xen/arch/x86/hvm/vlapic.c
>> +++ b/xen/arch/x86/hvm/vlapic.c
>> @@ -1003,14 +1003,12 @@ bool_t vlapic_msr_set(struct vlapic *vlapic,
>> uint64_t value)
>> }
>> else
>>
>>> On 31.05.17 at 09:46, wrote:
> --- a/xen/arch/x86/hvm/vlapic.c
> +++ b/xen/arch/x86/hvm/vlapic.c
> @@ -1003,14 +1003,12 @@ bool_t vlapic_msr_set(struct vlapic *vlapic, uint64_t
> value)
> }
> else
> {
> -if ( unlikely(vlapic_x2apic_mode(vlapic)) )
> -
According to SDM Chapter ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC)
-> Extended XAPIC (x2APIC) -> x2APIC State Transitions, The existing code to
handle guest's writing MSR_IA32_APICBASE has two flaws:
1. Transition from x2APIC Mode to Disabled Mode is allowed but wrongly
disabled currently.