ns corresponding to interrupts not owned
by the hardware domain.
Note that this is written to be domain agnostic; this allows the
potential to e.g. map the ictlr into multiple domains if this is desired
for passthrough in the future.
Signed-off-by: Kyle Temkin
---
xen/ar
t
be able to control registers that correspond to other domains' IRQs, or
sections associated with IRQs routed to Xen.
Signed-off-by: Kyle Temkin
---
xen/arch/arm/irq.c| 10 ++
xen/include/asm-arm/irq.h | 2 ++
2 files changed, 12 insertions(+)
diff --git a/xen/arch/arm/irq.c b
r than the hardware domain.
Signed-off-by: Kyle Temkin
---
xen/arch/arm/platforms/Makefile | 2 +
xen/arch/arm/platforms/tegra.c| 339 ++
xen/include/asm-arm/platforms/tegra.h | 50 +
3 files changed, 391 insertions(+)
create mode 100644 xe
ather than asssuming that the GIC will always be programmed to route
IRQs.
- Allows the platform to override IRQ translation, rather than assuming
GIC translation will always be followed. This is useful in cases where
device tree IRQ numbers don't correspond to GIC IRQ numbers.
Signed-off-
ms-- including Tegra-- require the NS16550 Rx timeout interrupt
to be enabled for receive to function properly. The same quirk is
applied in the eqvuialent Linux driver [1].
[1]
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=4539c24fe4f92c09ee668ef959d3e8180df619b9
Signed
The attached patch-set adds support for 32-bit and 64-bit Tegra SoCs; including
support for the Jetson TK1 and Jetson TX1 boards, as well as the Pixel C tablet.
It has been tested on the TK1, TX1, and Pixel C.
Many thanks to Ian Campbell, whose original Jetson TK1 patchset contained a lot
of point
ad
to incorrect assignment of interrupt parents, and throughly confuse the
hwdom. Instead of letting this fall to chance, pass through the
phandles.
Signed-off-by: Kyle Temkin
---
xen/arch/arm/domain_build.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/xen/arch/arm/d
Hi, Meng:
Julien is correct-- a coworker and I are working on support for Tegra
SoCs, and we've made pretty good progress; there's work yet to be
done, but we have dom0 and guests booting on the Jetson TK1, Jetson
TX1, and the Google Pixel C. We hope to get a patch set out soon--
unfortunately, ou
ores if the firmware/bootloader has previously initialized SPSel
to 0; in which case Xen's exceptions will incorrectly use an invalid SP_EL0,
and will endlessly spin on the synchronous abort handler.
Signed-off-by: Kyle Temkin
---
xen/arch/arm/arm64/head.S | 5 +
1 file changed, 5 insert
