Add AVX512 vpopcntdq information in xen-cpuid.c
Signed-off-by: He Chen
---
tools/misc/xen-cpuid.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c
index 5d66e94..106be0f 100644
--- a/tools/misc/xen-cpuid.c
+++ b/tools/misc
AVX512_VPOPCNTDQ: Vector POPCNT instructions for word and qwords.
variable precision.
Signed-off-by: He Chen
---
Changes from v1:
renanme VPOPCNTDQ to AVX512_VPOPCNTDQ.
---
xen/include/public/arch-x86/cpufeatureset.h | 1 +
xen/tools/gen-cpuid.py | 3 ++-
2 files changed, 3
On Tue, Jan 10, 2017 at 01:49:06AM -0700, Jan Beulich wrote:
> >>> On 10.01.17 at 07:34, wrote:
> > --- a/xen/include/public/arch-x86/cpufeatureset.h
> > +++ b/xen/include/public/arch-x86/cpufeatureset.h
> > @@ -226,6 +226,7 @@ XEN_CPUFEATURE(PREFETCHWT1, 6*32+ 0) /*A PREFETCHWT1
> > instructi
AVX512_VPOPCNTDQ: Vector POPCNT instructions for word and qwords.
variable precision.
Signed-off-by: He Chen
---
xen/include/public/arch-x86/cpufeatureset.h | 1 +
xen/tools/gen-cpuid.py | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/xen/include
Add two new AVX512 subfeatures support for guest.
AVX512_4VNNIW:
Vector instructions for deep learning enhanced word variable precision.
AVX512_4FMAPS:
Vector instructions for deep learning floating-point single precision.
Signed-off-by: Luwei Kang
Signed-off-by: He Chen
---
Changes from v1
Add two new AVX512 subfeatures support for guest.
AVX512_4VNNIW:
Vector instructions for deep learning enhanced word variable precision.
AVX512_4FMAPS:
Vector instructions for deep learning floating-point single precision.
Signed-off-by: Luwei Kang
Signed-off-by: He Chen
---
tools/libxc
HVM. In this way, 32-bit PV guest will not suffer SMEP/SMAP security
issue. Users can choose whether open SMEP/SMAP for Xen itself,
especially when they are going to run 32-bit PV guests.
Signed-off-by: He Chen
---
Changes in v8:
On Mon, Oct 10, 2016 at 06:16:41AM -0600, Jan Beulich wrote:
> >>> On 09.10.16 at 10:20, wrote:
> > Changes in v7:
> > * bugfix: fix the bug that this patch doesn't work on machine without SMAP.
> > * test: This patch has not been tested (on 32-bit PV environment).
> > Really sorry for tha
enable them for
HVM. In this way, 32-bit PV guest will not suffer SMEP/SMAP security
issue. Users can choose whether open SMEP/SMAP for Xen itself,
especially when they are going to run 32-bit PV guests.
Signed-off-by: He Chen
---
Changes in v7:
* bugfix: fix the bug that this patch doesn'
On Tue, Sep 20, 2016 at 12:53:32AM -0600, Jan Beulich wrote:
> >>> On 20.09.16 at 04:29, wrote:
> > Sorry for the late response, I saw the this patch was merged but soon
> > got reverted, and the revert message says this patch is still buggy.
> >
> > I would be most grateful if you would point ou
Hi Jan,
Sorry for the late response, I saw the this patch was merged but soon
got reverted, and the revert message says this patch is still buggy.
I would be most grateful if you would point out the buggy part of this
patch and the reason why revert it.
Thanks,
-He
_
HVM. In this way, 32-bit PV guest will not suffer SMEP/SMAP security
issue. Users can choose whether open SMEP/SMAP for Xen itself,
especially when they are going to run 32-bit PV guests.
Signed-off-by: He Chen
---
Changes in v6:
* fix sm{e,a}p parameters parser flow.
Changes in v5:
* refine
HVM. In this way, 32-bit PV guest will not suffer SMEP/SMAP security
issue. Users can choose whether open SMEP/SMAP for Xen itself,
especially when they are going to run 32-bit PV guests.
Signed-off-by: He Chen
---
Changes in v5:
* refine sm{e,a}p parameters parser flow.
* replace cpu_has_sm{e,a
HVM. In this way, 32-bit PV guest will not suffer SMEP/SMAP security
issue. Users can choose whether open SMEP/SMAP for Xen itself,
especially when they are going to run 32-bit PV guests.
Signed-off-by: He Chen
---
Changes in v4:
* introduce 2 new synthetic features X86_FEATURE_XEN_SMEP and
X86_
On Wed, Aug 24, 2016 at 04:01:53AM -0600, Jan Beulich wrote:
> >>> On 19.08.16 at 12:20, wrote:
> > Changes in v3:
> > * Fix boot options.
> > * Fix CR4 & mmu_cr4_features operations.
> > * Disable SMEP/SMAP for Dom0.
> > * Commit message refinement.
>
> Several of my comments on v3 did not get t
attempt to access user address although SMEP/SMAP is close for
PV guests already.
This patch is going to support enabling SMEP/SMAP for HVM but disabling
them for Xen hypervisor. Users can choose whether opening them for Xen,
especially when they are going to run 32-bit PV guests.
Signed-off-by: He Chen
On Thu, Aug 11, 2016 at 07:14:06AM -0600, Jan Beulich wrote:
> >>> On 11.08.16 at 11:17, wrote:
> > @@ -1404,12 +1438,20 @@ void __init noreturn __start_xen(unsigned long
> > mbi_p)
> > if ( !opt_smep )
> > setup_clear_cpu_cap(X86_FEATURE_SMEP);
> > if ( cpu_has_smep )
> > +
Enhance "skaj...@intel.com>mep" and "smap" command line options to support
enabling SMEP
or SMAP for HVM only with allowing "hvm" as a value.
Signed-off-by: He Chen
---
Changes in V2:
* Allow "hvm" as a value to "smep" and "smap" c
Enhance "smep" and "smap" command line options to support enabling SMEP
or SMAP for HVM only with allowing "hvm" as a value.
Signed-off-by: He Chen
---
Changes in V2:
* Allow "hvm" as a value to "smep" and "smap" command line options.
*
SMAP/SMEP may affect the 32-bit pv guests.
Users can determine whether turn SMAP/SMEP on for Xen hyperviosr when
running 32-bit pv guests.
Signed-off-by: He Chen
---
docs/misc/xen-command-line.markdown | 14 ++
xen/arch/x86/setup.c| 12 ++--
2 files changed
environment to test this patch,
I would really appreciate it if someone could help verify this patch :)
He Chen (1):
xen: enable/disable SMAP/SMEP for Xen itself
docs/misc/xen-command-line.markdown | 14 ++
xen/arch/x86/setup.c| 12 ++--
2 files changed, 24 i
er-vcpu basis could be interesting, and that's even
> more the case if we get to do L2 stuff, but there are two few RMIDs
> available for such a configuration to be really useful.
>
> > Xen programs different capacity bitmaps into IA32_L2_QOS_MASK_0 ...
> > IA32_L2_QOS_MASK
On Thu, May 12, 2016 at 04:05:36AM -0600, Jan Beulich wrote:
> >>> On 12.05.16 at 11:40, wrote:
> > % Intel L2 Cache Allocation Technology (L2 CAT) Feature
> > % Revision 1.0
> >
> > \clearpage
> >
> > Hi all,
> >
> > We plan to bring new PQoS feature called Intel L2 Cache Allocation
> > Techno
% Intel L2 Cache Allocation Technology (L2 CAT) Feature
% Revision 1.0
\clearpage
Hi all,
We plan to bring new PQoS feature called Intel L2 Cache Allocation
Technology (L2 CAT) to Xen.
L2 CAT is supported on Atom codename Goldmont and beyond. “Big-core”
Xeon does not support L2 CAT in current g
% Intel L2 Cache Allocation Technology (L2 CAT) Feature
% Revision 1.0
\clearpage
Hi all,
We plan to bring new PQoS feature called Intel L2 Cache Allocation
Technology (L2 CAT) to Xen.
L2 CAT is supported on Atom codename Goldmont and beyond. “Big-core”
Xeon does not support L2 CAT in current g
This is the xl/xc changes to support Intel Code/Data Prioritization.
CAT xl commands to set/get CBMs are extended to support CDP.
Add new CDP options with CAT commands in xl interface man page.
Add description of CDP in xl-psr.markdown.
Signed-off-by: He Chen
Reviewed-by: Chao Peng
Acked-by
l Broadwell server platform.
To make this patchset better, any comment or suggestion is welcomed, I would
really appreciate it.
Thanks.
He Chen (1):
tools & docs: add tools and docs support for Intel CDP
docs/man/xl.pod.1 | 15 ++
docs/misc/xl-psr.markdown | 53 +++
In non-debug build ASSERT_UNREACHABLE is nop and some compilers will
complain that cbm_code/cbm_data may be used uninitialized in function
psr_set_l3_cbm. Add return after ASSERT_UNREACHABLE to fix it.
Signed-off-by: He Chen
---
Changes in v2:
Sorry for mistake in first version of this patch
In non-debug build ASSERT_UNREACHABLE is nop and some compilers will
complain that cbm_code/cbm_data may be used uninitialized in function
psr_set_l3_cbm. Add return after ASSERT_UNREACHABLE to fix it.
Signed-off-by: He Chen
---
xen/arch/x86/psr.c | 1 +
1 file changed, 1 insertion(+)
diff
On Thu, Oct 15, 2015 at 09:47:37AM -0600, Jan Beulich wrote:
>
> Ah, yes, in cases like this it should always be followed by return
> (or whatever else is suitable). Sorry for not having spotted this
> during review.
>
Sorry for this bug. Is it proper to fix this bug by just adding a
return after
This is the xl/xc changes to support Intel Code/Data Prioritization.
CAT xl commands to set/get CBMs are extended to support CDP.
Add new CDP options with CAT commands in xl interface man page.
Add description of CDP in xl-psr.markdown.
Signed-off-by: He Chen
---
Changes in v7
Add boot parameter `psr=cdp` to enable CDP at boot time.
Intel Code/Data Prioritization (CDP) feature is based on CAT. Note that
cos_max would be half when CDP is on. struct psr_cat_cbm is extended to
support CDP operation. Extend psr_get_cat_l3_info sysctl to get CDP
status.
Signed-off-by: He
anges, please see in
each patch.
This v7 patchset has been tested on Intel Broadwell server platform.
To make this patchset better, any comment or suggestion is welcomed, I would
really appreciate it.
Thanks.
He Chen (3):
x86: Support enable CDP by boot parameter and add get CDP status
x8
ion CBMs are extended to support CDP.
Signed-off-by: He Chen
Reviewed-by: Andrew Cooper
Reviewed-by: Chao Peng
---
Changes in v7:
* amend function find_cos and pick_avail_cos to ignore reference count
for COS0
* code style
Changes in v6:
* remove variable need_write and restruct code in psr_se
stion is welcomed, I would
really appreciate it.
Thanks.
He Chen (3):
x86: Support enable CDP by boot parameter and add get CDP status
x86: add domctl cmd to set/get CDP code/data CBM
tools & docs: add tools and docs support for Intel CDP
docs/man/xl.pod.1 | 15 +++
docs
This is the xl/xc changes to support Intel Code/Data Prioritization.
CAT xl commands to set/get CBMs are extended to support CDP.
Add new CDP options with CAT commands in xl interface man page.
Add description of CDP in xl-psr.markdown.
Signed-off-by: He Chen
---
Changes in v6:
* separate CBM
ion CBMs are extended to support CDP.
Signed-off-by: He Chen
Reviewed-by: Andrew Cooper
---
Changes in v6:
* remove variable need_write and restruct code in psr_set_l3_cbm
* remove redundant type == PSR_CBM_TYPE_L3 in psr_get_l3_cbm
Changes in v5:
* replace -EINVAL with -ENXIO when setting code/dat
Add boot parameter `psr=cdp` to enable CDP at boot time.
Intel Code/Data Prioritization (CDP) feature is based on CAT. Note that
cos_max would be half when CDP is on. struct psr_cat_cbm is extended to
support CDP operation. Extend psr_get_cat_l3_info sysctl to get CDP
status.
Signed-off-by: He
Add boot parameter `psr=cdp` to enable CDP at boot time.
Intel Code/Data Prioritization (CDP) feature is based on CAT. Note that
cos_max would be half when CDP is on. struct psr_cat_cbm is extended to
support CDP operation. Extend psr_get_cat_l3_info sysctl to get CDP
status.
Signed-off-by: He
ion CBMs are extended to support CDP.
Signed-off-by: He Chen
Reviewed-by: Andrew Cooper
---
Changes in v5:
* replace -EINVAL with -ENXIO when setting code/data CBM on CDP
disabled.
---
xen/arch/x86/domctl.c | 32 +++-
xen/arch/x86/psr.c
support CDP. For all the changes, please see in
each patch.
This v5 patchset has been tested on Intel Broadwell server platform.
To make this patchset better, any comment or suggestion is welcomed, I would
really appreciate it.
Thanks.
He Chen (3):
x86: Support enable CDP by boot parameter and
This is the xl/xc changes to support Intel Code/Data Prioritization.
CAT xl commands to set/get CBMs are extended to support CDP.
Add new CDP options with CAT commands in xl interface man page.
Add description of CDP in xl-psr.markdown.
Signed-off-by: He Chen
---
Changes in v5:
* merge tools and
On Fri, Sep 25, 2015 at 10:58:58AM +0100, Ian Campbell wrote:
> On Fri, 2015-09-25 at 17:29 +0800, He Chen wrote:
> > On Thu, Sep 24, 2015 at 12:22:02PM +0100, Ian Campbell wrote:
> > > On Thu, 2015-09-17 at 17:35 +0800, He Chen wrote:
> > > > Add new CDP options wit
> Quoting the relevant bits of code for clarity:
> libxl_psr_cbm_type type = LIBXL_PSR_CBM_TYPE_L3_CBM;
> ...
> case 'd':
> type = LIBXL_PSR_CBM_TYPE_L3_DATA;
> opt_data = 1;
> break;
> case 'c':
> type = LIBXL_PSR_CBM_TYPE_L3_CODE;
> opt_cod
On Thu, Sep 24, 2015 at 12:22:02PM +0100, Ian Campbell wrote:
> On Thu, 2015-09-17 at 17:35 +0800, He Chen wrote:
> > Add new CDP options with CAT commands in xl interface man page.
> > Add description of CDP in xl-psr.markdown.
>
> It would have been fine to include this in
On Thu, Sep 24, 2015 at 12:22:47PM +0100, Ian Campbell wrote:
> On Thu, 2015-09-24 at 12:07 +0100, Ian Campbell wrote:
> > @@ -8517,8 +8535,19 @@ int main_psr_cat_cbm_set(int argc, char **argv)
> > > libxl_string_list_dispose(&socket_list);
> > > free(value);
> > > break;
On Thu, Sep 24, 2015 at 12:07:27PM +0100, Ian Campbell wrote:
> On Thu, 2015-09-17 at 17:35 +0800, He Chen wrote:
> > @@ -8410,20 +8415,29 @@ static void psr_cat_print_one_domain_cbm(uint32_t
> > domid, uint32_t socketid)
> > printf("%5d%25s", domid, domain_n
ion CBMs are extended to support CDP.
Signed-off-by: He Chen
---
xen/arch/x86/domctl.c | 32 -
xen/arch/x86/psr.c | 165 ++--
xen/include/asm-x86/psr.h | 12 +++-
xen/include/public/domctl.h | 4 ++
4 files changed, 172 insertion
es CDP feature in Xen based on CAT code, and extends
CBM operation functions to support CDP. For all the changes, please see in
each patch.
This v4 patchset has been tested on Intel Broadwell server platform.
To make this patchset better, any comment or suggestion is welcomed, I would
really appr
Add new CDP options with CAT commands in xl interface man page.
Add description of CDP in xl-psr.markdown.
Signed-off-by: He Chen
---
docs/man/xl.pod.1 | 14 ++
docs/misc/xl-psr.markdown | 44 +++-
2 files changed, 53 insertions(+), 5
Add boot parameter `psr=cdp` to enable CDP at boot time.
Intel Code/Data Prioritization(CDP) feature is based on CAT. Note that
cos_max would be half when CDP is on. struct psr_cat_cbm is extended to
support CDP operation. Extend psr_get_cat_l3_info sysctl to get CDP
status.
Signed-off-by: He
This is the xl/xc changes to support Intel Code/Data Prioritization.
CAT xl commands to set/get CBMs are extended to support CDP.
Signed-off-by: He Chen
---
tools/libxc/include/xenctrl.h | 7 +--
tools/libxc/xc_psr.c | 17 ++-
tools/libxl/libxl.h | 7
This is the xl/xc changes to support Intel Code/Data Prioritization.
CAT xl commands to set/get CBMs are extended to support CDP.
Signed-off-by: He Chen
---
tools/libxc/include/xenctrl.h | 7 +--
tools/libxc/xc_psr.c | 17 ++-
tools/libxl/libxl.h | 1
Add new CDP option with CAT commands in xl interface man page.
Add description of CDP in xl-psr.markdown.
Signed-off-by: He Chen
---
docs/man/xl.pod.1 | 14 ++
docs/misc/xl-psr.markdown | 42 +-
2 files changed, 51 insertions(+), 5
Add boot parameter `psr=cdp` to enable CDP at boot time.
Intel Code/Data Prioritization(CDP) feature is based on CAT. Note that
cos_max would be half when CDP is on. struct psr_cat_cbm is extended to
support CDP operation. Extend psr_get_cat_l3_info sysctl to get CDP
status.
Signed-off-by: He
iate it.
Thanks
He Chen (4):
x86: Support enable CDP by boot parameter and add get CDP status
x86: add domctl cmd to set/get CDP code/data CBM
tools: add tools support for Intel CDP
docs: add document to introduce CDP command
docs/man/xl.pod.1 | 14 +++
docs/misc
peration CBMs are extended to support CDP.
Signed-off-by: He Chen
---
xen/arch/x86/domctl.c | 32 -
xen/arch/x86/psr.c | 166 ++--
xen/include/asm-x86/psr.h | 12 +++-
xen/include/public/domctl.h | 4 ++
4 files changed, 174 in
On Wed, Sep 09, 2015 at 03:32:11PM +0800, Chao Peng wrote:
> On Wed, Sep 09, 2015 at 01:16:47PM +0800, He Chen wrote:
> > This is the xl/xc changes to support Intel Code/Data Prioritization.
> > CAT xl commands to set/get CBMs are extended to support CDP.
> >
>
On Wed, Sep 09, 2015 at 03:04:35PM +0800, Chao Peng wrote:
> On Wed, Sep 09, 2015 at 01:16:45PM +0800, He Chen wrote:
> > Intel Code/Data Prioritization(CDP) feature is based on CAT. cdp_enabled
> > is added to CAT socket info to indicate CDP is on or off on the socket,
> > no
This is the xl/xc changes to support Intel Code/Data Prioritization.
CAT xl commands to set/get CBMs are extended to support CDP.
Signed-off-by: He Chen
---
tools/libxc/include/xenctrl.h | 7 --
tools/libxc/xc_psr.c | 17 +-
tools/libxl/libxl.h | 10
peration CBMs are extended to support CDP.
Signed-off-by: He Chen
---
xen/arch/x86/domctl.c | 32 -
xen/arch/x86/psr.c | 163 ++--
xen/include/asm-x86/psr.h | 12 +++-
xen/include/public/domctl.h | 4 ++
4 files changed, 170 in
status.
Signed-off-by: He Chen
---
xen/arch/x86/psr.c | 84 ++---
xen/arch/x86/sysctl.c | 5 ++-
xen/include/asm-x86/msr-index.h | 3 ++
xen/include/asm-x86/psr.h | 11 +-
xen/include/public/sysctl.h | 2 +
5 files changed
, any comment or suggestion is welcomed, I would
really appreciate it.
Thanks
He Chen (4):
x86: Support enable CDP by boot parameter and add get CDP status
x86: add domctl cmd to set/get CDP code/data CBM
tools: add tools support for Intel CDP
docs: add document to introduce CDP command
docs
Add CDP command in xl interface man page and add description of CDP
in xl-psr.markdown.
Signed-off-by: He Chen
---
docs/man/xl.pod.1 | 14 ++
docs/misc/xl-psr.markdown | 44 +++-
2 files changed, 53 insertions(+), 5 deletions(-)
diff
On Wed, Sep 02, 2015 at 12:59:07PM +0100, Andrew Cooper wrote:
> On 02/09/15 09:28, He Chen wrote:
> > CDP extends CAT and provides the capacity to control L3 code & data
> > cache. With CDP, one COS correspond to two CMBs(code & data). cbm_type
> > is added to supp
On Wed, Sep 02, 2015 at 01:08:33PM +0100, Andrew Cooper wrote:
> On 02/09/15 09:27, He Chen wrote:
> > Hi all,
> >
> > Code/Data Prioritization(CDP) is offered in Intel Broadwell and later server
> > platforms, which is an extension of CAT. CDP enables isolation and sep
CDP is supported in the platform.
Signed-off-by: He Chen
---
xen/arch/x86/psr.c| 13 -
xen/include/asm-x86/psr.h | 4
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index c0daa2e..b357816 100644
--- a/xen/arch/x86
This is the xc/xl changes to support Intel Code/Data Prioritization.
Two new xl commands are introduced to enable/disable CDP dynamically,
and CAT xl commands to set/get CBMs are extended to support CDP.
Signed-off-by: He Chen
---
tools/libxc/include/xenctrl.h | 10 --
tools/libxc/xc_psr.c
peration CBMs are extended to support CDP.
Signed-off-by: He Chen
---
xen/arch/x86/domctl.c | 33 +-
xen/arch/x86/psr.c | 142
xen/include/asm-x86/psr.h | 12 +++-
xen/include/public/domctl.h | 4 ++
4 files changed, 150 in
enable/disable
CDP dynamically. For all the changes, please see in each patch.
This patchset has been tested on Intel Broadwell server platform.
To make this patchset better, any comment or suggestion is welcomed, I would
really appreciate it.
Thanks
He Chen (5):
x86: detect Intel CDP feature
.
Signed-off-by: He Chen
---
xen/arch/x86/psr.c | 164
xen/arch/x86/sysctl.c | 9 ++-
xen/include/asm-x86/psr.h | 10 ++-
xen/include/public/sysctl.h | 5 ++
4 files changed, 174 insertions(+), 14 deletions(-)
diff --git a/xen/arch
Add CDP command in xl interface man page and add description of CDP
in xl-psr.markdown.
Signed-off-by: He Chen
---
docs/man/xl.pod.1 | 22 +++
docs/misc/xl-psr.markdown | 56 ++-
2 files changed, 73 insertions(+), 5 deletions
72 matches
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