Hello James, Julien,
regarding your previous mails. I was able to single step every instruction
of my module. The problem (or rather the solution) was to _disable_ the IRQ
interrupts from within my guest module. This solves the problem of
singlestepping a module which previously ended in a spinloc
> Sets TDE to trap debug exceptions to EL2 from lower exception levels. I'm
>> surprised this isn't always set for Xen. Do you allow guests to use the
>> debug
>> features for their own purposes?
>>
>
> No. We already trap debug exceptions to EL2 by default and MDCR_EL2 should
> already be configur
Hey Julien,
Would you mind sharing the latest version of your code?
>
>
Of course not. This is the current version:
asmlinkage void leave_hypervisor_tail(void)
> {
> +/*This methode will be called after the 'guest_entry' macro in
> /arch/arm64/entry.S set guest registers
> +Check single
any proof for this.
If I'm using the software step exception for only one instruction and
disable it right after it (from within xen-access with an VM_EVENT) the VM
will work without problems.
Any help to find the missing step in order to enable VM single stepping
would be appreciated
Greeting
2017-07-04 20:37 GMT+02:00 Julien Grall :
>
> On 07/04/2017 01:30 PM, Florian Jakobsmeier wrote:
>
>> Hello all,
>>
>
> Hi Florian,
>
>
> asmlinkage void leave_hypervisor_tail(void)
>> {
>> +/*This methode will be called aft
Hello all,
I'm trying to implement a single step functionality for XEN on ARMv8 using
"Software Step Exceptions". My problem with this is, that after taking the
exception the PC will stay on the same instruction.
By adding a "singlestep_enabled" flag in the "struct arch_domain" (based on
the sing
Hello Julien,
thank you for your answer and sorry for the delay.
2017-06-14 14:26 GMT+02:00 Julien Grall :
>
>
> On 06/12/2017 10:34 AM, Florian Jakobsmeier wrote:
>
>> Dear all,
>>
>
> Hello Florian,
>
>
> I don't have much experience with the d
Dear all,
as part of my Bachelor's Thesis I'm trying to implement a single-stepping
functionality for Xen on ARMv7. My problem with this is, that I'm not able
to trigger a Hardware Breakpoint, which is configured to use Instruction
Address Mismatch and route the exception to Xen.
I took the x86 s
