> +/*
> + * Interface for NVDIMM management.
> + */
> +
> +struct xen_sysctl_nvdimm_op {
> +uint32_t cmd; /* IN: XEN_SYSCTL_nvdimm_*; none is implemented
> yet. */
> +uint32_t pad; /* IN: Always zero. */
If alignment is the only concern, then err can be moved to here.
If it's designed fo
On Mon, 2017-09-11 at 12:37 +0800, Haozhong Zhang wrote:
> ... to avoid the inference with the PMEM driver and management
> utilities in Dom0.
>
> Signed-off-by: Haozhong Zhang
> ---
> Cc: Jan Beulich
> Cc: Andrew Cooper
> Cc: Gang Wei
> Cc: Shane Wang
> ---
> xen/arch/x86/acpi/power.c | 7
> +
> +/**
> + * Add a PMEM region to a list. All PMEM regions in the list are
> + * sorted in the ascending order of the start address. A PMEM region,
> + * whose range is overlapped with anyone in the list, cannot be added
> + * to the list.
> + *
> + * Parameters:
> + * list: the list to
> +static void __init acpi_nfit_register_pmem(struct acpi_nfit_desc
> *desc)
> +{
> +struct nfit_spa_desc *spa_desc;
> +struct nfit_memdev_desc *memdev_desc;
> +struct acpi_nfit_system_address *spa;
> +unsigned long smfn, emfn;
> +
> +list_for_each_entry(memdev_desc, &desc->mem
> +#ifdef CONFIG_NVDIMM_PMEM
> +static void __init init_frametable_pmem_chunk(unsigned long s,
> unsigned long e)
> +{
> +static unsigned long pmem_init_frametable_mfn;
> +
> +ASSERT(!((s | e) & (PAGE_SIZE - 1)));
> +
> +if ( !pmem_init_frametable_mfn )
> +{
> +pmem_init_fr
On Fri, 2017-10-27 at 10:24 +0100, Andrew Cooper wrote:
> On 27/10/17 07:58, Chao Peng wrote:
> >
> > On Mon, 2017-09-11 at 12:37 +0800, Haozhong Zhang wrote:
> > >
> > > Replace pdx_to_page(pfn_to_pdx(pfn)) by mfn_to_page(pfn), which is
> > > ide
On Mon, 2017-09-11 at 12:37 +0800, Haozhong Zhang wrote:
> cleanup_frame_table() initializes the entire newly added frame table
> to all -1's. If it's called after extend_frame_table() failed to map
> the entire frame table, the initialization will hit a page fault.
>
> Move the cleanup of partial
On Mon, 2017-09-11 at 12:37 +0800, Haozhong Zhang wrote:
> Replace pdx_to_page(pfn_to_pdx(pfn)) by mfn_to_page(pfn), which is
> identical to the former.
Looks good to me.
Chao
>
> Signed-off-by: Haozhong Zhang
> ---
> Cc: Jan Beulich
> Cc: Andrew Cooper
> ---
> xen/arch/x86/x86_64/mm.c | 7 +
On Mon, 2017-09-11 at 12:37 +0800, Haozhong Zhang wrote:
> The current check refuses the hot-plugged memory that falls in one
> unused PDX group, which should be allowed.
Looks reasonable to me. The only thing I can think of is you can double
check if the following find_next_zero_bit/find_next_bit
On Mon, 2017-09-11 at 12:37 +0800, Haozhong Zhang wrote:
> Overview
> ==
>
> > (RFC v2 can be found at https://lists.xen.org/archives/html/xen-
devel/2017-03/msg02401.html)
>
> Well, this RFC v3 changes and inflates a lot from previous versions.
> The primary changes are listed be
On Wed, 2017-10-11 at 09:55 +0800, Yi Sun wrote:
> The whole value array is transferred into 'do_write_psr_msrs'. Then,
> we can
> write all features values on the cos id into MSRs.
>
> Because multiple features may co-exist, we need handle all features to
> write
> values of them into a COS regis
efined
> > interfaces.
> > (suggested by Roger Pau Monné)
> > v2:
> > - remove '_INFO' in 'libxl_psr_feat_type' and make corresponding
> > changes in 'libxl_psr_hw_info'.
> > (suggested by Chao Peng)
>
On Tue, 2017-08-22 at 10:24 +0800, Yi Sun wrote:
> On 17-08-21 18:14:49, Chao Peng wrote:
> >
> >
> > >
> > >
> > > -static void libxl__psr_cat_log_err_msg(libxl__gc *gc, int err)
> > > +sta
On Tue, 2017-08-22 at 10:38 +0800, Yi Sun wrote:
> On 17-08-21 18:12:18, Chao Peng wrote:
> >
> >
> > >
> > > * mode: C
> > > diff --git a/tools/libxl/libxl_types.idl
> > > b/tools/libxl/libxl_types.idl
> > > index 6e80d36..10d317
On Tue, 2017-08-15 at 12:25 +0100, Wei Liu wrote:
> On Wed, Aug 09, 2017 at 03:41:51PM +0800, Yi Sun wrote:
> >
> > This patch implements a new set value interface in tools suitable
> > for all psr
> > allocation features and the whole flow. It also enables MBA support
> > to set
> > MBA value in
>
> -static void libxl__psr_cat_log_err_msg(libxl__gc *gc, int err)
> +static void libxl__psr_alloc_log_err_msg(libxl__gc *gc,
> + int err,
> + libxl_psr_cbm_type type)
> {
> +/*
> + * Index is 'libxl_psr_cb
On Wed, 2017-08-09 at 15:41 +0800, Yi Sun wrote:
> This patch renames 'xc_psr_cat_type' to 'xc_psr_val_type' so that
> the structure name is common for all allocation features.
>
> Signed-off-by: Yi Sun
Reviewed-by: Chao Peng
_
> int libxl_psr_cat_get_info(libxl_ctx *ctx, libxl_psr_cat_info **info,
> int *nr, unsigned int lvl)
> {
> GC_INIT(ctx);
> int rc;
> -int i = 0, socketid, nr_sockets;
> -libxl_bitmap socketmap;
> +unsigned int i;
> +libxl_psr_hw_info *hw_info
> * mode: C
> diff --git a/tools/libxl/libxl_types.idl b/tools/libxl/libxl_types.idl
> index 6e80d36..10d317b 100644
> --- a/tools/libxl/libxl_types.idl
> +++ b/tools/libxl/libxl_types.idl
> @@ -977,6 +977,7 @@ libxl_psr_cbm_type = Enumeration("psr_cbm_type", [
> (2, "L3_CBM_CODE"),
>
> > >
> > >
> > > +/*
> > > + * Because multiple features may co-exist, we need handle all
> > > features to write
> > > + * values of them into a COS register with new COS ID. E.g:
> > > + * 1. L3 CAT and MBA co-exist.
> > > + * 2. Dom1 and Dom2 share a same COS ID (2). The L3 CAT CBM of
> > >
> +if ( feat->mba_info.linear )
> +{
> +unsigned int mod;
> +
> +if ( feat->mba_info.thrtl_max >= 100 )
> +return false;
Can we do this check earlier, e.g. when it gets enumerated from CPUID?
> +
> +mod = *thrtl % (100 - feat->mba_info.thrtl_max);
> +
On Wed, 2017-08-16 at 14:43 +0800, Yi Sun wrote:
> On 17-08-16 14:38:28, Chao Peng wrote:
> >
> > On Wed, 2017-08-09 at 15:41 +0800, Yi Sun wrote:
> > >
> > > This patch implements get value domctl interface for MBA.
&
On Wed, 2017-08-09 at 15:41 +0800, Yi Sun wrote:
> This patch implements get value domctl interface for MBA.
>
> Signed-off-by: Yi Sun
> ---
...
> --- a/xen/include/public/domctl.h
> +++ b/xen/include/public/domctl.h
> @@ -1144,6 +1144,7 @@ struct xen_domctl_psr_alloc_op {
> #define XEN_DOMCTL
On Wed, 2017-08-09 at 15:41 +0800, Yi Sun wrote:
> This patch implements get HW info flow for MBA including its callback
> function and sysctl interface.
>
> Signed-off-by: Yi Sun
> ---
> v1:
> - sort 'PSR_INFO_IDX_' macros as feature.
> (sugg
On Wed, 2017-08-09 at 15:41 +0800, Yi Sun wrote:
> This patch implements main data structures of MBA.
>
> Like CAT features, MBA HW info has cos_max which means the max cos
> registers number, and thrtl_max which means the max throttle value
Similarly, there is no existence of 'cos register', 'co
> -enum cbm_type {
> -PSR_CBM_TYPE_L3,
> -PSR_CBM_TYPE_L3_CODE,
> -PSR_CBM_TYPE_L3_DATA,
> -PSR_CBM_TYPE_L2,
> -PSR_CBM_TYPE_UNKNOWN,
> +enum psr_val_type {
> +PSR_VAL_TYPE_L3,
> +PSR_VAL_TYPE_L3_CODE,
> +PSR_VAL_TYPE_L3_DATA,
> +PSR_VAL_TYPE_L2,
> +PSR_VAL_T
> > > +
> > > +# Areas for improvement
> > > +
> > > +A hexadecimal number is used to show THRTL for a domain now. It
> > > may
> > > not be user-
> > > +friendly.
> > > +
> > > +To improve this, the libxl interfaces can be wrapped in libvirt
> > > to
> > > provide more
> > > +usr-friendly interfac
> + Linear mode: the input precision is defined as 100-(MBA_MAX).
> For instance,
> + if the MBA_MAX value is 90, the input precision is 10%. Values
> not an even
> + multiple of the precision (e.g., 12%) will be rounded down
> (e.g., to 10%
> + delay applied) by HW automatically.
> /* write_msr is used to write out feature MSR register. */
> void (*write_msr)(unsigned int cos, uint32_t val, enum
> psr_val_type type);
> +
> +/*
> + * check_change_val is used to check if input val fulfills SDM
> requirement.
> + * Change it to valid value if SDM allows.
> diff --git a/xen/include/asm-x86/psr.h b/xen/include/asm-x86/psr.h
> index 551ccf3..81da1c2 100644
> --- a/xen/include/asm-x86/psr.h
> +++ b/xen/include/asm-x86/psr.h
> @@ -38,7 +38,9 @@
> /* Used by psr_get_info() */
> #define PSR_INFO_IDX_COS_MAX0
> #define PSR_INFO_IDX_CAT_CBM_
> @@ -71,7 +78,6 @@ enum psr_feat_type {
> /*
> * This structure represents one feature.
> * cos_max - The max COS registers number got through CPUID.
> - * cbm_len - The length of CBM got through CPUID.
As you are moving instead of removing the code, the comment can also
move togeth
> Anthony Perard did a great job providing patches which add a partial
> Q35
> support. I tried extending his patches to include missing features for
> Q35 in
> hvmloader, libacpi and QEMU and so far the Xen+Q35 experience is quite
> positive
Hi Alexey,
I saw Anthony's patch, but your extension
On Fri, May 27, 2016 at 04:08:00AM -0600, Jan Beulich wrote:
> >>> On 27.05.16 at 08:25, wrote:
> > Bug detailed description:
> > 1:When offline all the socket1 cpus , network segment hang .
> > 2:When online all the socket1 cpus , it show "(XEN) Panic on CPU 44:".
> > 3: Haswell-ep and Haswell-ex
opt_psr is now not only used at booting time but also at runtime.
More specifically, it is used to check CDP switch in psr_cpu_init()
which can potentially be called in CPU hotplug case.
Signed-off-by: Chao Peng
---
xen/arch/x86/psr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
On Thu, Nov 26, 2015 at 12:49:42AM -0700, Jan Beulich wrote:
> >>> On 26.11.15 at 00:27, wrote:
> > A few more data points: I also tested Xen 4.6 on VMware ESXi 5.5, and
> > it yields similar results. Not surprising, since Fusion uses basically
> > the same virtualization engine.
> >
> > However,
On Tue, Nov 24, 2015 at 03:34:45AM -0700, Jan Beulich wrote:
> >>> On 23.11.15 at 17:36, wrote:
> > I instrumented detect_extended_topology() and ran again with 4 CPUs.
> >[...]
> > (XEN) smp_store_cpu_info id=3
> > (XEN) detect_extended_topology cpuid_count op=0xb count=0 eax=0x0 ebx=0x1
> > ecx
On Mon, Nov 23, 2015 at 09:10:08AM +0800, Chao Peng wrote:
> On Fri, Nov 20, 2015 at 05:21:11PM -0800, Ed Swierk wrote:
> > The problem is that the index of the socket_cpumask array is derived via
> > cpu_to_socket() from the APIC ID of the processor in a given socket, but
>
On Fri, Nov 20, 2015 at 05:21:11PM -0800, Ed Swierk wrote:
> The problem is that the index of the socket_cpumask array is derived via
> cpu_to_socket() from the APIC ID of the processor in a given socket, but
> the size of the array is computed based on nr_sockets, which is not
> necessarily equal
7;t notice this before but I guess 'info->cdp_enabled' here
really would be 'info[i].cdp_enabled' as CDP status is per-socket.
Current code will always print the data for the first socket in each
iteration, which is undesirable.
With this and the indention issue proposed b
gt; comes forward with further comments; otherwise I'm kind of hoping
> for a Reviewed-by-him).
Correct, it can be a optimization and I don't see any problem. So please feel
free to adjust it. Thereby:
Reviewed-by: Chao Peng
>
> Jan
___
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
tion. Extend psr_get_cat_l3_info sysctl to get CDP
> status.
>
> Signed-off-by: He Chen
> Reviewed-by: Andrew Cooper
> ---
> Changes in v7:
> * write CDP data mask (mask1) before turning CDP on
> * check CDP status before clear enabled bit in function
remove redundant type == PSR_CBM_TYPE_L3 in psr_get_l3_cbm
Looks good to me. Just several coding style issues. With that fixed:
Reviewed-by: Chao Peng
> +static int find_cos(struct psr_cat_cbm *map, unsigned int cos_max,
> +uint64_t cbm_code, uint64_t cbm_data, bool_t cdp_ena
> +if ( (ecx & PSR_CAT_CDP_CAPABILITY) && (opt_psr & PSR_CDP) &&
> + cdp_socket_enable && !test_bit(socket, cdp_socket_enable) )
> +{
> +rdmsrl(MSR_IA32_PSR_L3_QOS_CFG, val);
> +wrmsrl(MSR_IA32_PSR_L3_QOS_CFG, val | (1 <<
> PSR_L3_QOS_CDP_ENABLE_
> > Actually this is a suggestion from Lars during
> > he reviewing the documents for the 4.6 release. Because when one opens
> > the generic page he/she will see several options (combined volume set,
> > three-volume set and seven-volume set), it may be not easy to find out
> > the related chapte
> +bool_t cdp_enabled = cdp_is_enabled(socket, cdp_socket_enable);
>
> if ( IS_ERR(info) )
> return PTR_ERR(info);
>
> -*cbm = info->cos_to_cbm[d->arch.psr_cos_ids[socket]].cbm;
> +switch ( type )
> +{
> +case PSR_CBM_TYPE_L3:
> +if ( type == PSR_CBM_TY
>
> +static inline bool_t cdp_is_enabled(unsigned int socket,
> +unsigned long *cdp_socket_enable)
Since cdp_socket_enable is defined in file scope, I don't think it's
required to pass again.
Chao
> +{
> +return cdp_socket_enable && test_bit(socket, cdp_
On Tue, Sep 29, 2015 at 02:47:39PM +0100, Ian Campbell wrote:
> On Mon, 2015-09-28 at 16:29 +0800, He Chen wrote:
> > -"17.14 - Platform Shared Resource Monitoring: Cache Monitoring Technology".
> > +"Platform Shared Resource Monitoring: Cache Monitoring Technology".
>
> I think these will clash w
On Tue, Sep 29, 2015 at 11:30:53AM +0100, Ian Campbell wrote:
> On Tue, 2015-09-29 at 10:33 +0100, Wei Liu wrote:
> > Now the reasoning bits. Yes, I'm arguing with myself, :-)
> >
> > We can of course fix it post-4.6, but the released APIs need to be
> > maintained forever (even if it is in fact b
On Tue, Sep 29, 2015 at 10:55:40AM +0100, Ian Campbell wrote:
> On Tue, 2015-09-29 at 10:27 +0100, Andrew Cooper wrote:
> > On 29/09/15 08:49, Chao Peng wrote:
> > > Drop the chapter number as it can be confusing when it gets changed in
> > > the referred document.
>
Drop the chapter number as it can be confusing when it gets changed in
the referred document.
Signed-off-by: Chao Peng
Reviewed-by: Dario Faggioli
Acked-by: Wei Liu
---
v2:
* minor commit message adjustment.
---
docs/misc/xl-psr.markdown | 8
1 file changed, 4 insertions(+), 4
socket 1,2,3.
The fix is getting the socket bitmap for all the sockets on the system
first and then displaying CMT information for_each_set_bit in that bitmap.
Signed-off-by: Chao Peng
Acked-by: Wei Liu
---
v2:
* add libxl_bitmap_init().
---
tools/libxl/xl_cmdimpl.c | 43
Section 'IGNORED FOR COMPATIBILITY WITH XM' separates 'CACHE MONITORING
TECHNOLOGY' and 'CACHE ALLOCATION TECHNOLOGY' but they really should be
put together.
Signed-off-by: Chao Peng
---
Current incorrect output can be seen at:
http://xenbits.xen.org/docs/unstabl
history
v2:
* Address comments from Wei/Dario.
* Add patch6.
Chao Peng (6):
tools/libxl: introduce libxl_get_online_socketmap
tools/libxl: fix socket display error for CMT
tools/libxl: return socket id from libxl_psr_cat_get_l3_info
tools/libxl: fix range check in main_psr_cat_cbm_set
. The xl or similar consumers then can display
socket information correctly.
Signed-off-by: Chao Peng
---
v2:
* add libxl_bitmap_init();
* rename target_id to id.
* fix the iteration code in psr_cat_hwinfo().
---
tools/libxl/libxl_psr.c | 23 ++-
tools/libxl/libxl_types.idl
It sets the bit on the given bitmap if the corresponding socket is
available and clears the bit when the corresponding socket is not
available.
Signed-off-by: Chao Peng
---
v2:
* rename libxl_socket_bitmap_fill => libxl_get_online_socketmap.
* fix blanklines.
NOTE:LIBXL_HAVE_SOCKET_BITMAP_AL
On Mon, Sep 28, 2015 at 05:42:25PM +0200, Dario Faggioli wrote:
> On Mon, 2015-09-28 at 15:16 +0100, Wei Liu wrote:
> > On Mon, Sep 28, 2015 at 07:54:48PM +0800, Chao Peng wrote:
> > > The patch basically contains several PSR fixes in libxl.
> > > patch1-3: fix the sock
On Mon, Sep 28, 2015 at 04:46:17PM +0100, Wei Liu wrote:
> On Mon, Sep 28, 2015 at 05:35:56PM +0200, Dario Faggioli wrote:
> > On Mon, 2015-09-28 at 15:13 +0100, Wei Liu wrote:
> > > On Mon, Sep 28, 2015 at 07:54:51PM +0800, Chao Peng wrote:
> >
> > > > di
On Mon, Sep 28, 2015 at 04:36:54PM +0100, Wei Liu wrote:
> On Mon, Sep 28, 2015 at 05:06:31PM +0200, Dario Faggioli wrote:
> > On Mon, 2015-09-28 at 19:54 +0800, Chao Peng wrote:
> >
> > > diff --git a/tools/libxl/xl_cmdimpl.c b/tools/libxl/xl_cmdimpl.c
> > &
On Mon, Sep 28, 2015 at 03:12:27PM +0100, Wei Liu wrote:
> On Mon, Sep 28, 2015 at 07:54:49PM +0800, Chao Peng wrote:
> > It sets the bit on the given bitmap if the corresponding socket is
> > available and clears the bit when the corresponding socket is not
> > available.
&
On Mon, Sep 28, 2015 at 04:53:58PM +0200, Dario Faggioli wrote:
> On Mon, 2015-09-28 at 15:12 +0100, Wei Liu wrote:
> > On Mon, Sep 28, 2015 at 07:54:49PM +0800, Chao Peng wrote:
>
> > > diff --git a/tools/libxl/libxl.h b/tools/libxl/libxl.h
> > > index 5f9047c..5a
. The xl or similar consumers then can display
socket information correctly. For the sake of future extention, the
field added to libxl_psr_cat_info is named as target_id.
Signed-off-by: Chao Peng
---
tools/libxl/libxl_psr.c | 21 -
tools/libxl/libxl_types.idl | 1 +
tools
Make the chapter name and reference url more precise. The chapter number
is dropped as it can be confusing when it gets changed in the referred
document.
Signed-off-by: Chao Peng
---
docs/misc/xl-psr.markdown | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/docs/misc
socket 1,2,3.
The fix is getting the socket bitmap for all the sockets on the system
first and then displaying CMT information for_each_set_bit in that bitmap.
Signed-off-by: Chao Peng
---
tools/libxl/xl_cmdimpl.c | 42 ++
1 file changed, 22 insertions
It sets the bit on the given bitmap if the corresponding socket is
available and clears the bit when the corresponding socket is not
available.
Signed-off-by: Chao Peng
---
tools/libxl/libxl.h | 7 ---
tools/libxl/libxl_utils.c | 21 +
tools/libxl/libxl_utils.h
The patch basically contains several PSR fixes in libxl.
patch1-3: fix the socket display error in certain hotplug case.
patch4: fix a minor range check.
patch5: improve the PSR document.
Detailed problem and fix please see commit message.
Chao Peng (5):
tools/libxl: introduce
On Mon, Sep 14, 2015 at 11:27:03AM +0800, He Chen wrote:
> Changes in v3:
> - x86: remove redundant CDP field in cat_socket_enable (suggested by Chao)
> - tools: simplify CBM setting function in tools (suggested by Jan)
> - docs: Add boot parameter description (suggested by Chao & Ian)
> - code sty
On Mon, Sep 14, 2015 at 11:27:07AM +0800, He Chen wrote:
> Add new CDP option with CAT commands in xl interface man page.
^s to
> Add description of CDP in xl-psr.markdown.
>
> Signed-off-by: He Chen
> ---
> docs/man/xl.pod.1 | 14 ++
> docs/misc/xl-psr.mar
On Mon, Sep 14, 2015 at 11:27:06AM +0800, He Chen wrote:
> This is the xl/xc changes to support Intel Code/Data Prioritization.
> CAT xl commands to set/get CBMs are extended to support CDP.
>
> Signed-off-by: He Chen
> ---
> #define LIBXL_HAVE_PSR_CAT 1
> +
? And you still need to broadcast the
t;= info->cos_max; cos++ )
> +switch( type )
Coding style.
> +{
> +cos = pick_avail_cos(map, cos_max, old_cos);
> +if ( cos < 0 )
> +{
> +spin_unlock(&info->cbm_lock);
> +return cos;
> +}
> +
>
On Mon, Sep 14, 2015 at 11:27:04AM +0800, He Chen wrote:
> @@ -1165,9 +1165,9 @@ This option can be specified more than once (up to 8
> times at present).
> > `= `
>
> ### psr (Intel)
> -> `= List of ( cmt: | rmid_max: | cat: |
> cos_max: )`
> +> `= List of ( cmt: | rmid_max: | cat: |
> cos_
On Wed, Sep 09, 2015 at 02:37:36AM -0600, Jan Beulich wrote:
> >>> On 09.09.15 at 10:10, wrote:
> > On Wed, Sep 09, 2015 at 03:32:11PM +0800, Chao Peng wrote:
> >> On Wed, Sep 09, 2015 at 01:16:47PM +0800, He Chen wrote:
> >> > @@ -304,14 +305,41 @@ i
On Wed, Sep 09, 2015 at 01:16:44PM +0800, He Chen wrote:
> Changes in v2:
> - x86: Enable CDP by boot parameter instead of enabling/disabling CDP at
> runtime (suggested by Andrew)
As you added a new boot option, you also need a patch for
docs/misc/xen-command-line.markdown.
Chao
> - tools: remov
On Wed, Sep 09, 2015 at 01:16:47PM +0800, He Chen wrote:
> This is the xl/xc changes to support Intel Code/Data Prioritization.
> CAT xl commands to set/get CBMs are extended to support CDP.
>
> Signed-off-by: He Chen
> ---
> diff --git a/tools/libxl/libxl.h b/tools/libxl/libxl.h
> index 5f9047c.
On Wed, Sep 09, 2015 at 01:16:46PM +0800, He Chen wrote:
> CDP extends CAT and provides the capacity to control L3 code & data
> cache. With CDP, one COS correspond to two CMBs(code & data). cbm_type
> is added to support distinguish different CBM operation. Besides, new
> domctl cmds are introdunc
On Wed, Sep 09, 2015 at 01:16:45PM +0800, He Chen wrote:
> Intel Code/Data Prioritization(CDP) feature is based on CAT. cdp_enabled
> is added to CAT socket info to indicate CDP is on or off on the socket,
> note that cos_max would be half when CDP is on. struct psr_cat_cbm is
> extended to support
On Wed, Sep 02, 2015 at 01:08:33PM +0100, Andrew Cooper wrote:
> On 02/09/15 09:27, He Chen wrote:
> > Hi all,
> >
> > Code/Data Prioritization(CDP) is offered in Intel Broadwell and later server
> > platforms, which is an extension of CAT. CDP enables isolation and separate
> > prioritization of c
ode or even use
updated firmware, which is I prefered.
>
> 2015-09-01 10:42 GMT-04:00 Meng Xu :
> > 2015-09-01 10:30 GMT-04:00 Andrew Cooper :
> >> On 01/09/15 15:20, Meng Xu wrote:
> >>> 2015-09-01 9:04 GMT-04:00 Andrew Cooper :
> >>>> On 01/
On Tue, Sep 01, 2015 at 10:42:57AM -0400, Meng Xu wrote:
> 2015-09-01 10:30 GMT-04:00 Andrew Cooper :
> > On 01/09/15 15:20, Meng Xu wrote:
> >> 2015-09-01 9:04 GMT-04:00 Andrew Cooper :
> >>> On 01/09/15 13:55, Meng Xu wrote:
> >>>> 2015-09-01 1:47
On Mon, Aug 31, 2015 at 04:09:31PM -0400, Meng Xu wrote:
> I looked into the xen/arch/x86/psr.c and found that the function
> cat_cpu_init() just returned without initializing the variable
> "cat_socket_enable".
>
> Both !cpu_has(c, X86_FEATURE_CAT) and c->cpuid_level <
> PSR_CPUID_LEVEL_CAT are
sumed
in CPU_STARTING notifier.
Signed-off-by: Chao Peng
---
xen/arch/x86/psr.c | 21 +
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 861683f..ed59803 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@
cpu_to_socket(cpu)
can be used in cpu_smpboot_free().
The same is done for cpu_core_id/compute_unit_id and due to that
cpu_sibling_setup_map is private to the file so it's moved as well.
Reported-by: Dario Faggioli
Suggested-by: Jan Beulich
Signed-off-by: Chao Peng
---
v2: use less intr
On Mon, Jul 13, 2015 at 09:55:39AM +0100, Jan Beulich wrote:
> >>> On 13.07.15 at 05:36, wrote:
> > phys_proc_id is invalidated in remove_siblinginfo() which gets called
> > before cpu_smpboot_free(). This means calling cpu_to_socket(cpu) in
> > cpu_smpboot_free() is not possible to be correct.
>
(cpu).
The clearing of cpu_{core,sibling}_mask in remove_siblinginfo() is also
removed as now both masks will get freed afterwards so clearing is
useless.
Signed-off-by: Chao Peng
Reported-by: Dario Faggioli
---
xen/arch/x86/smpboot.c | 55 +-
1 file
On Fri, Jul 10, 2015 at 06:03:54PM +0200, Dario Faggioli wrote:
> On Fri, 2015-07-10 at 16:25 +0100, Jan Beulich wrote:
> > >>> On 10.07.15 at 17:13, wrote:
>
> > > cpu_down()
> > > stop_machine_run(take_cpu_down, ...)
> > > notifier_call_chain(&cpu_chain, CPU_DYING, ...)
> > > __cpu_di
On Thu, Jul 09, 2015 at 10:41:55AM +0100, Jan Beulich wrote:
> >>> On 09.07.15 at 10:26, wrote:
> > @@ -748,8 +758,9 @@ static int cpu_smpboot_alloc(unsigned int cpu)
> > goto oom;
> > per_cpu(stubs.addr, cpu) = stub_page + STUB_BUF_CPU_OFFS(cpu);
> >
> > -if ( !socket_cpumask[
)
and later consume it in smp_store_cpu_info().
This patch also change socket_cpumask type from 'cpumask_var_t *'
to 'cpumask_t **' so that smaller NR_CPUS works.
Reported-by: Boris Ostrovsky
Tested-by: Dario Faggioli
Signed-off-by: Chao Peng
---
Changes in v3:
* use type safe x
t; > Signed-off-by: Andrew Cooper
>
> Acked-by: Ian Campbell
>
> I'll wait a bit before applying to give Chao a chance to have a look.
Thanks and I verified it successfully on my psr-enabled box.
Chao
>
> > CC: Ian Jackson
> > CC: Wei Liu
> >
Socket ID : 0
L3 Cache: 12288KB
Default CBM : 0xfff
ID NAME CBM
0 Domain-00xff
Signed-off-by: Chao Peng
Reviewed-by: Dario Faggioli
Acked-by: Ian Campbell
---
Changes in v11:
* Building fix on i686: PRIx64=>llx
Add document to introduce basic concepts and terms in PSR family
technologies and the xl interfaces.
Signed-off-by: Chao Peng
Acked-by: Ian Campbell
---
Changes in v7:
* Correct 'xl psr-hwinfo'.
Changes in v6:
* Address comments from Ian.
Changes in v5:
* Address comments from
ntel SDM
(http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf)
[2] CAT design for XEN(
http://lists.xen.org/archives/html/xen-devel/2014-12/msg01382.html)
Chao Peng (5):
tools/libxl: minor name changes for CMT commands
t
Use "-" instead of "_" for monitor types.
Signed-off-by: Chao Peng
Reviewed-by: Dario Faggioli
Acked-by: Ian Campbell
---
tools/libxl/xl_cmdimpl.c | 6 +++---
tools/libxl/xl_cmdtable.c | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/tools/
Add libxl_socket_bitmap_alloc() to allow allocating a socket specific
libxl_bitmap (as it is for cpu/node bitmap).
Internal function libxl__count_physical_sockets() is introduced together
to get the socket count when the size of bitmap is not specified.
Signed-off-by: Chao Peng
Acked-by: Ian
Add dedicated one to show hardware information.
[root@vmm-psr]xl psr-hwinfo
Cache Monitoring Technology (CMT):
Enabled : 1
Total RMID : 63
Supported monitor types:
cache-occupancy
total-mem-bandwidth
local-mem-bandwidth
Signed-off-by: Chao Peng
Reviewed-by: Dario Faggioli
Acked-by
)
and later consume it in smp_store_cpu_info().
This patch also change socket_cpumask type from 'cpumask_var_t *'
to 'cpumask_t **' so that smaller NR_CPUS works.
Reported-by: Boris Ostrovsky
Signed-off-by: Chao Peng
---
Changes in v2:
* Fix case that booting cpu is on the
On Wed, Jul 08, 2015 at 05:32:11PM +0100, Jan Beulich wrote:
> >>> On 08.07.15 at 18:17, wrote:
> > I think it has to do with the fact that I've got CPU #0 on socket #1,
> > while Boris' (and perhaps Chao's too) test box have it on socket #0.
>
> Ah, yes, this is indeed a case I didn't consider w
On Wed, Jul 08, 2015 at 04:38:52PM +0100, Jan Beulich wrote:
> >>> On 08.07.15 at 17:11, wrote:
> > On Wed, 2015-07-08 at 13:38 +0100, Jan Beulich wrote:
> >> >>> On 08.07.15 at 11:36, wrote:
> >> > @@ -84,11 +85,21 @@ void *stack_base[NR_CPUS];
> >> > static void smp_store_cpu_info(int id)
> >>
On Wed, Jul 08, 2015 at 11:02:10AM +0100, Wei Liu wrote:
>
> Chao, 4.6 freeze is on Friday. Can you fix that minor bug and
> repost your series within two days?
>
Sure, I will post another version later today.
Thanks,
Chao
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On Tue, Jul 07, 2015 at 03:46:21PM +0100, Ian Campbell wrote:
> On Fri, 2015-06-26 at 16:43 +0800, Chao Peng wrote:
> > Chao Peng (13):
> > x86: add socket_cpumask
> > x86: detect and initialize Intel CAT feature
> > x86: maintain COS to CBM mapping for eac
For AP, phys_proc_id is still not valid in CPU_PREPARE notifier
(cpu_smpboot_alloc), so cpu_to_socket(cpu) is not valid as well.
Introduce a pre-allocated secondary_cpu_mask so that later in
smp_store_cpu_info() socket_cpumask[socket] can consume it.
Signed-off-by: Chao Peng
---
This is
On Tue, Jul 07, 2015 at 06:32:55PM -0400, Boris Ostrovsky wrote:
> On 06/26/2015 04:43 AM, Chao Peng wrote:
> >Maintain socket_cpumask which contains all the HT and core siblings
> >in the same socket.
> >
> >Signed-off-by: Chao Peng
> >Acked-by: Jan Beulich
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