Hi,
This series failed automatic build test. Please find the testing commands and
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Subject: [Qemu-devel] [PATCH v3 0/3] Qemu: add Xen vIOMMU interrupt remapping
function support
Type: series
Message-id: 15108
On 16/11/17 22:10, Anshul Makkar wrote:
> [Trimming the Cc-list a bit]
>
>
> On 9/14/17 7:37 AM, Juergen Gross wrote:
>> On 12/09/17 02:45, anshulmakkar wrote:
>>> Introduces scheduler specific parameter at libxl level which are
>>> passed on to libxc. eg runqueue for credit2
>>>
>>> Signed-off-b
On 16/11/17 21:50, Josh Poimboeuf wrote:
> On Wed, Oct 25, 2017 at 11:33:43AM +0200, Juergen Gross wrote:
>> On 04/10/17 17:58, Josh Poimboeuf wrote:
>>> Some of the paravirt '*_CLOBBERS' macros refer to output constraints
>>> instead of clobbers, which makes the code extra confusing. Rename the
>
Previously, some fields (reserved or unalterable) are filtered by
Qemu. This fields are useless for the legacy interrupt format.
However, these fields are may meaningful (for intel platform)
for the interrupt of remapping format. It is better to pass the whole
msi addr/data to Xen without any filte
Add libxc helpers for XEN_DOMCTL_viommu_op. Now, it has one sub-command
- create(): create a vIOMMU in Xen, given viommu type, register-set
location and capabilities
Signed-off-by: Chao Gao
Signed-off-by: Lan Tianyu
---
v4:
- remove destroy() sub-command
v3:
- Remove API for queryi
The BIOS reports the remapping hardware units in a platform to system software
through the DMA Remapping Reporting (DMAR) ACPI table.
New fields are introduced for DMAR table. These new fields are set by
toolstack through parsing guest's config file. construct_dmar() is added to
build DMAR table ac
According to VT-d spec Interrupt Remapping and Interrupt Posting ->
Interrupt Remapping -> Interrupt Request Formats On Intel 64
Platforms, fields of MSI data register have changed. This patch
avoids wrongly regarding a remappable format interrupt request as
an interrupt binded with a pirq.
Signed
If guest is configured to have a vIOMMU, create it during domain construction.
Signed-off-by: Chao Gao
Signed-off-by: Lan Tianyu
---
v4:
- s/LOGED/LOGD
v3:
- Remove the process of querying capabilities.
---
tools/libxl/libxl_x86.c | 17 +
1 file changed, 17 insertions(+)
dif
This patchset is to deal with MSI interrupt remapping request when guest
updates MSI registers.
In case of conflicts, this series also can be found in my personal github:
Xen: https://github.com/gc1008/viommu_xen.git vIOMMU4
Qemu: https://github.com/gc1008/viommu_qemu.git vIOMMU3
Any comments wou
A new logic is added to init_acpi_config(). The logic initializes
some fields introduced for DMAR table. For PVH guest, the DMAR table
is built as other tables. But for HVM guest, only the DMAR table is
built in toolstack and pass through it to guest via existing mechanism.
Signed-off-by: Chao Gao
When irq remapping is enabled, IOAPIC Redirection Entry may be in remapping
format. If that, generate an irq_remapping_request and call the common
VIOMMU abstraction's callback to handle this interrupt request. Device
model is responsible for checking the request's validity.
Signed-off-by: Chao Ga
Interrupt translation faults are non-recoverable fault. When faults
are triggered, it needs to populate fault info to Fault Recording
Registers and inject msi interrupt to notify guest IOMMU driver
to deal with faults.
This patch emulates hardware's handling interrupt translation
faults (more info
Different platform may use different method to distinguish
remapping format interrupt and normal format interrupt.
Intel uses one bit in IOAPIC RTE or MSI address register to
indicate the interrupt is remapping format. vvtd should handle
all the interrupts when .check_irq_remapping() return true.
This patch adds VVTD MMIO handler to deal with MMIO access.
Signed-off-by: Chao Gao
Signed-off-by: Lan Tianyu
---
v4:
- only trap the register emulated in vvtd_in_range().
i.e. replace PAGE_SIZE with the VVTD_MAX_OFFSET
---
xen/drivers/passthrough/vtd/vvtd.c | 55 +++
When delivering guest msi, firstly, the format of the msi is determined
by the 'check_irq_remmapping' method of viommu. Then, msi of
non-remapping format is delivered as normal and remapping format msi is
handled by viommu. When handling eoi, the interrupt attributes (vector,
affinity) are used to
Add dmar table structure according Chapter 8 "BIOS Considerations" of
VTd spec Rev. 2.4.
VTd
spec:http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf
Signed-off-by: Chao Gao
Signed-off-by: Lan Tianyu
---
tools/libacpi/acpi2_0.h | 61 +
Software writes to QIE field of GCMD to enable or disable queued
invalidations. This patch emulates QIE field of GCMD.
Signed-off-by: Chao Gao
Signed-off-by: Lan Tianyu
---
xen/drivers/passthrough/vtd/iommu.h | 3 ++-
xen/drivers/passthrough/vtd/vvtd.c | 18 ++
2 files changed
... rather than a filtered one. Previously, some fields (reserved or
unalterable) are filtered by QEMU. These fields are useless for the
legacy interrupt format (i.e. non remappable format). However, these
fields are meaningful to remappable format. Accepting the whole msi
message will significantl
Without interrupt remapping, interrupt attributes can be extracted from
msi message or IOAPIC RTE. However, with interrupt remapping enabled,
the attributes are enclosed in the associated IRTE. This callback is
for cases in which the caller wants to acquire interrupt attributes, for
example:
1. vio
A field, viommu_info, is added to struct libxl_domain_build_info. Several
attributes can be specified by guest config file for virtual IOMMU. These
attributes are used for DMAR construction and vIOMMU creation.
Signed-off-by: Chao Gao
Signed-off-by: Lan Tianyu
---
v4:
- Move VTD_BASE_ADDRESS's
... handlding guest's invalidation request.
To support pirq migration optimization and using VT-d posted interrupt to
inject msi from assigned devices, each time guest programs msi information
(affinity, vector), the struct hvm_gmsi_info should be updated accordingly.
But after introducing vvtd, g
When IOAPIC RTE is in remapping format, it doesn't contain the vector of
interrupt. For this case, the RTE contains an index of interrupt remapping
table where the vector of interrupt is stored. This patchs gets the vector
through a vIOMMU interface.
Signed-off-by: Chao Gao
Signed-off-by: Lan Tia
Queued Invalidation Interface is an expanded invalidation interface with
extended capabilities. Hardware implementations report support for queued
invalidation interface through the Extended Capability Register. The queued
invalidation interface uses an Invalidation Queue (IQ), which is a circular
Provide a save-restore pair to save/restore registers and non-register
status.
Signed-off-by: Chao Gao
Signed-off-by: Lan Tianyu
---
v3:
- use one entry to save both vvtd registers and other intermediate
state
---
xen/drivers/passthrough/vtd/vvtd.c | 57 +++---
When a remapping interrupt request arrives, remapping hardware computes the
interrupt_index per the algorithm described in VTD spec
"Interrupt Remapping Table", interprets the IRTE and generates a remapped
interrupt request.
This patch introduces viommu_handle_irq_request() to emulate the process
This patch contains following changes:
- align register definitions
- use MASK_EXTR to define some macros about extended capabilies
rather than open-coding the masks
- define fields of FECTL and FESTS as uint32_t rather than u64 since
FECTL and FESTS are 32 bit registers.
No functional changes.
S
Software writes this field to enable/disable interrupt reampping. This
patch emulate IRES field of GCMD. Currently, Guest's whole IRT are
mapped to Xen permanently for the latency of delivering interrupt. And
the old mapping is undone if present when trying to set up a new one.
Signed-off-by: Chao
This patch adds create/destroy function for the emulated VTD
and adapts it to the common VIOMMU abstraction.
As the Makefile is changed here, put all files in alphabetic order
by this chance.
Signed-off-by: Chao Gao
Signed-off-by: Lan Tianyu
---
v4:
- use REGISTER_VIOMMU
- shrink the size of h
This patchset is to introduce vIOMMU framework and add virtual VTD's
interrupt remapping support according "Xen virtual IOMMU high level
design doc V3"(https://lists.xenproject.org/archives/html/xen-devel/
2016-11/msg01391.html).
- vIOMMU framework
New framework provides viommu_ops and help functi
From: Lan Tianyu
This patch is to add irq request callback for platform implementation
to deal with irq remapping request.
Signed-off-by: Lan Tianyu
Signed-off-by: Chao Gao
---
xen/common/viommu.c | 15
xen/include/asm-x86/viommu.h | 54 ++
Software sets SIRTP field of GCMD to set/update the interrupt remapping
table pointer used by hardware. The interrupt remapping table pointer is
specified through the Interrupt Remapping Table Address (IRTA_REG)
register.
This patch emulates this operation and adds some new fields in VVTD to track
From: Lan Tianyu
This patch is to add callback for vIOAPIC and vMSI to check whether interrupt
remapping is enabled.
Signed-off-by: Lan Tianyu
Signed-off-by: Chao Gao
---
xen/common/viommu.c | 15 +++
xen/include/xen/viommu.h | 4
2 files changed, 19 insertions(+)
diff
From: Lan Tianyu
This patch is to add get_irq_info callback for platform implementation
to convert irq remapping request to irq info (E,G vector, dest, dest_mode
and so on).
Signed-off-by: Lan Tianyu
Signed-off-by: Chao Gao
---
xen/common/viommu.c | 16
xen/include/a
From: Lan Tianyu
This patch is to introduce an abstract layer for arch vIOMMU implementation
and vIOMMU domctl to deal with requests from tool stack. Arch vIOMMU code needs
to
provide callback. vIOMMU domctl supports to create vIOMMU instance in hypervisor
and it will be destroyed during destroy
From: Lan Tianyu
This patch is to add Xen virtual IOMMU doc to introduce motivation,
framework, vIOMMU hypercall and xl configuration.
Signed-off-by: Lan Tianyu
Signed-off-by: Chao Gao
---
docs/misc/viommu.txt | 120 +++
1 file changed, 120 inse
On 16/11/17 22:19, Josh Poimboeuf wrote:
> On Wed, Oct 25, 2017 at 01:25:02PM +0200, Juergen Gross wrote:
>> On 04/10/17 17:58, Josh Poimboeuf wrote:
>>> Add alternative patching support for replacing an instruction with an
>>> indirect call. This will be needed for the paravirt alternatives.
>>>
flight 116222 xen-4.6-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/116222/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-xtf-amd64-amd64-3 49 xtf/test-hvm64-lbr-tsx-vmentry fail REGR. vs. 115190
test-xtf-amd64-
flight 116223 xen-4.5-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/116223/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-libvirt-qcow2 15 guest-saverestore.2 fail REGR. vs. 115226
test-amd64-amd6
This run is configured for baseline tests only.
flight 72455 xen-unstable real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/72455/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-armhf-armhf-examine 11 examine-serial/
flight 72456 distros-debian-wheezy real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/72456/
Perfect :-)
All tests in this flight passed as required
baseline version:
flight 72436
jobs:
build-amd64 pass
build-armh
flight 116219 xen-4.7-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/116219/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-xtf-amd64-amd64-1 49 xtf/test-hvm64-lbr-tsx-vmentry fail REGR. vs. 115210
build-armhf-xsm
Ever since it was introduced in c/s bd1f0b45ff, hvm_save_cpu_msrs() has had a
bug whereby it corrupts the HVM context stream if some, but fewer than the
maximum number of MSRs are written.
_hvm_init_entry() creates an hvm_save_descriptor with length for
msr_count_max, but in the case that we write
On Thu, Nov 09, 2017 at 11:13:42AM +, Roger Pau Monne wrote:
> Preparatory change before adding llvm profiling support.
> No functional change.
>
> Signed-off-by: Roger Pau Monné
> ---
> Cc: Andrew Cooper
> Cc: George Dunlap
> Cc: Ian Jackson
> Cc: Jan Beulich
> Cc: Konrad Rzeszutek Wilk
On Thu, Nov 09, 2017 at 11:13:43AM +, Roger Pau Monne wrote:
> Change gcov to cov (for internal interfaces) or coverage (for the
> public ones).
>
> Signed-off-by: Roger Pau Monné
> ---
> Cc: Ian Jackson
> Cc: Wei Liu
> Cc: Andrew Cooper
> Cc: George Dunlap
> Cc: Jan Beulich
> Cc: Konrad
On Thu, Nov 09, 2017 at 11:13:45AM +, Roger Pau Monne wrote:
> It will contain the generic implementation of sysctl_cov_op, which
> will be shared between all the coverage implementations.
>
> Signed-off-by: Roger Pau Monné
> ---
> Cc: Andrew Cooper
> Cc: George Dunlap
> Cc: Ian Jackson
>
On Thu, Nov 09, 2017 at 11:13:46AM +, Roger Pau Monne wrote:
> So it can be used by both gcc and clang. Just add the Kconfig option
> and modify the makefiles so the llvm coverage specific code can be
> added in a follow up patch.
>
> Signed-off-by: Roger Pau Monné
> ---
> Cc: Andrew Cooper
On Thu, Nov 09, 2017 at 11:13:44AM +, Roger Pau Monne wrote:
> So that other implementations of the sysctl can be added.
>
> Signed-off-by: Roger Pau Monné
> ---
> Cc: Andrew Cooper
> Cc: George Dunlap
> Cc: Ian Jackson
> Cc: Jan Beulich
> Cc: Konrad Rzeszutek Wilk
> Cc: Stefano Stabelli
On AMD family 17h processors, there is a feature called virtual GIF.
This allows a nested hypervisor to preform a CLGI or STGI without
needing to be intercepted by the host hypervisor. For more information
about it please see:
AMD64 Architecture Programmer’s Manual Volume 2: System Programming
ht
Add support for enabling the virtual GIF feature.
Signed-off-by: Brian Woods
---
xen/include/asm-x86/hvm/svm/svm.h | 2 ++
xen/include/asm-x86/hvm/svm/vmcb.h | 6 --
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/xen/include/asm-x86/hvm/svm/svm.h
b/xen/include/asm-x86/hvm/s
This patch detects and enables Virtual GIF if available. This allows
a nested hypervisor to perform STGIs and CLGIs without having to be
intercepted by host hypervisor.
Signed-off-by: Brian Woods
---
xen/arch/x86/hvm/svm/nestedsvm.c | 7 ++-
xen/arch/x86/hvm/svm/svm.c | 1 +
xen/arch/
.snip..
> [0.00] Booting Linux on physical CPU 0x0
>
> [0.00] Linux version 4.13.0-linaro-hikey960+ (mc@xenpro3) (gcc
> version 7.1.1 20170510 (Linaro GCC 7.1-2017.05)) #1 SMP PREEMPT Wed Sep 13
> 10:16:12 EDT 2017
What branch is this? And what git repo ?
_
On Wed, Oct 25, 2017 at 01:25:02PM +0200, Juergen Gross wrote:
> On 04/10/17 17:58, Josh Poimboeuf wrote:
> > Add alternative patching support for replacing an instruction with an
> > indirect call. This will be needed for the paravirt alternatives.
> >
> > Signed-off-by: Josh Poimboeuf
> > ---
There are two bugs in process_vcpu_msrs() which clearly demonstrate that I
didn't test this bit of Migration v2 very well when writing it...
vcpu->msrsz is always expected to be a multiple of xen_domctl_vcpu_msr_t
records in a spec-compliant stream, so the modulo yields 0 for the msr_count,
rather
[Trimming the Cc-list a bit]
On 9/14/17 7:37 AM, Juergen Gross wrote:
On 12/09/17 02:45, anshulmakkar wrote:
Introduces scheduler specific parameter at libxl level which are
passed on to libxc. eg runqueue for credit2
Signed-off-by: Anshul Makkar
int libxl_cpupool_destroy(libxl_ctx *ctx,
On Wed, Oct 25, 2017 at 11:46:18AM +0200, Juergen Gross wrote:
> On 04/10/17 17:58, Josh Poimboeuf wrote:
> > Convert the hard-coded native patch assembly code strings to macros to
> > facilitate sharing common code between 32-bit and 64-bit.
> >
> > These macros will also be used by a future patc
On Wed, Oct 25, 2017 at 11:33:43AM +0200, Juergen Gross wrote:
> On 04/10/17 17:58, Josh Poimboeuf wrote:
> > Some of the paravirt '*_CLOBBERS' macros refer to output constraints
> > instead of clobbers, which makes the code extra confusing. Rename the
> > output constraint related macros to '*_OU
flight 116221 xen-4.8-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/116221/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-xl-qemut-win7-amd64 16 guest-localmigrate/x10 fail REGR. vs.
115205
test-amd6
flight 116232 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/116232/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-armhf-armhf-xl 1
Hello,
Looking at
https://xenbits.xen.org/xsa/advisory-243.html,
I cannot find the second patch for xen 4.8, xsa243-4.8-2.patch.
The text of the advisory leads me to believe that it should be there, so
it seems to be missing.
-- Chris
___
Xen-devel mail
On 11/16/2017 12:19 PM, Brian Woods wrote:
> On AMD family 17h processors, there is a feature called virtual GIF.
> This allows a nested hypervisor to preform a CLGI or STGI without
> needing to be intercepted by the host hypervisor. For more information
> about it please see:
>
> AMD64 Architectu
Doing so amounts to silent state corruption, and must be avoided.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Wei Liu
CC: Jun Nakajima
CC: Kevin Tian
CC: Boris Ostrovsky
CC: Suravee Suthikulpanit
CC: Julien Grall
This wants backporting to all stable trees, so should also be consi
On Thu, 16 Nov 2017, Julien Grall wrote:
> On 11/16/2017 01:36 AM, Stefano Stabellini wrote:
> > On Wed, 15 Nov 2017, Julien Grall wrote:
> > > The function get_page_from_gva is used by copy_*_guest helpers to
> > > translate a guest virtual address to a machine physical address and take
> > > refe
For me too, thanks!
On Thu, 16 Nov 2017, Artem Mygaiev wrote:
> Hi Julien
>
>
> 22nd works good for us
>
> ___
> From: Juli
Hi all,
On 16 November 2017 at 09:40, osstest service owner
wrote:
> flight 116216 libvirt real [real]
> http://logs.test-lab.xenproject.org/osstest/logs/116216/
>
> Regressions :-(
>
> Tests which did not succeed and are blocking,
> including tests which could not be run:
> build-i386-libvirt
Linus,
Please git pull the following tag:
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git
for-linus-4.15-rc1-tag
xen: features and fixes for v4.15-rc1
Apart from several small fixes it contains the following features:
- a series by Joao Martins to add vdso support of the pv clock i
flight 116220 xen-4.9-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/116220/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-xl-qemut-stubdom-debianhvm-amd64-xsm 10 debian-hvm-install
fail REGR. vs. 1152
On Thu, Nov 16, 2017 at 12:44:27PM -0500, Konrad Rzeszutek Wilk wrote:
> The patch says 'v2', but I don't see anything having changed here.
>
> Usually one adds comments in here (right after ---) with something
> to the effect of:
>
> v1: New version
> v2: Nothing new.
>
> Or if something did ch
On Thu, Nov 16, 2017 at 11:19:38AM -0600, Brian Woods wrote:
> Add support for enabling the virtual GIF feature.
>
> Signed-off-by: Brian Woods
> ---
> xen/include/asm-x86/hvm/svm/svm.h | 2 ++
> xen/include/asm-x86/hvm/svm/vmcb.h | 6 --
> 2 files changed, 6 insertions(+), 2 deletions(-)
This patch detects and enables Virtual GIF if available. This allows
a nested hypervisor to perform STGIs and CLGIs without having to be
intercepted by host hypervisor.
Signed-off-by: Brian Woods
---
xen/arch/x86/hvm/svm/nestedsvm.c | 7 ++-
xen/arch/x86/hvm/svm/svm.c | 1 +
xen/arc
On AMD family 17h processors, there is a feature called virtual GIF.
This allows a nested hypervisor to preform a CLGI or STGI without
needing to be intercepted by the host hypervisor. For more information
about it please see:
AMD64 Architecture Programmer’s Manual Volume 2: System Programming
ht
Add support for enabling the virtual GIF feature.
Signed-off-by: Brian Woods
---
xen/include/asm-x86/hvm/svm/svm.h | 2 ++
xen/include/asm-x86/hvm/svm/vmcb.h | 6 --
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/xen/include/asm-x86/hvm/svm/svm.h
b/xen/include/asm-x86/hvm/s
Hi,
On 16/11/17 14:57, Oleksandr Tyshchenko wrote:
> On Wed, Nov 15, 2017 at 4:28 PM, Andre Przywara
> wrote:
>> Hi,
> Hi Andre, Jassi
>
> Thank you for your comments!
>
>>
>> On 14/11/17 20:46, Oleksandr Tyshchenko wrote:
>>> On Tue, Nov 14, 2017 at 12:49 PM, Andre Przywara
>>> wrote:
Hi
Hi all,
On Tue, Oct 17, 2017 at 4:10 AM, Dario Faggioli wrote:
>
> On Wed, 2017-10-11 at 14:02 -0400, Meng Xu wrote:
> > Change repl_budget event output for xentrace formats and xenalyze
> >
> > Signed-off-by: Meng Xu
> >
> I'd say:
>
> Reviewed-by: Dario Faggioli
>
Just a friendly reminder:
On Mon, Nov 13, 2017 at 03:41:22PM +, George Dunlap wrote:
> With the exception of driver domains, which depend on PCI passthrough,
> and will be introduced later.
>
> Signed-off-by: George Dunlap
> ---
> CC: Ian Jackson
> CC: Wei Liu
> CC: Andrew Cooper
> CC: Jan Beulich
> CC: Stefano St
On 16/11/17 15:32, Brian Woods wrote:
> This patch detects and enables Virtual GIF if available. This allows
> a nested hypervisor to perform STGIs and CLGIs without having to be
> intercepted by host hypervisor.
>
> Signed-off-by: Brian Woods
> ---
> xen/arch/x86/hvm/svm/nestedsvm.c | 7 ++-
Hi George,
On 13/11/17 15:41, George Dunlap wrote:
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Rich Persaud
CC: Marek Marczykowski-Górecki
CC: Christopher Clark
CC: James McKen
Hi George,
On 13/11/17 15:41, George Dunlap wrote:
Signed-off-by: George Dunlap
---
Do we need to add anything more here?
And do we need to include ARM ACPI for guests?
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
C
Hi George,
On 13/11/17 15:41, George Dunlap wrote:
Signed-off-by: George Dunlap
---
Do we need to add anything more here?
And do we need to include ARM ACPI for guests?
I don't have any opinion here. However, if we decide to include, then we
should also include Device-Tree.
CC: Ian Jack
This patch detects and enables Virtual GIF if available. This allows
a nested hypervisor to perform STGIs and CLGIs without having to be
intercepted by host hypervisor.
Signed-off-by: Brian Woods
---
xen/arch/x86/hvm/svm/nestedsvm.c | 7 ++-
xen/arch/x86/hvm/svm/svm.c | 1 +
xen/arch/
Add support for enabling the virtual GIF feature.
Signed-off-by: Brian Woods
---
xen/include/asm-x86/hvm/svm/svm.h | 2 ++
xen/include/asm-x86/hvm/svm/vmcb.h | 6 --
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/xen/include/asm-x86/hvm/svm/svm.h
b/xen/include/asm-x86/hvm/s
On AMD family 17h processors, there is a feature called virtual GIF.
This allows a nested hypervisor to preform a CLGI or STGI without
needing to be intercepted by the host hypervisor. For more information
about it please see:
AMD64 Architecture Programmer’s Manual Volume 2: System Programming
ht
On 11/16/2017 03:19 PM, Julien Grall wrote:
> Hi George,
>
> On 13/11/17 15:41, George Dunlap wrote:
>> Superpage support and PVHVM.
>>
>> Signed-off-by: George Dunlap
>> ---
>> CC: Ian Jackson
>> CC: Wei Liu
>> CC: Andrew Cooper
>> CC: Jan Beulich
>> CC: Stefano Stabellini
>> CC: Konrad Wil
On Friday, 17 November 2017 2:09:09 AM AEDT Ian Jackson wrote:
> George Dunlap writes ("Re: [BUG] Error applying XSA240 update 5 on 4.8 and
4.9 (patch 3 references CONFIG_PV_LINEAR_PT, 3285e75dea89, x86/mm: Make PV
linear pagetables optional)"):
> > These are two different things. Steve's reluct
Hi George,
On 13/11/17 15:41, George Dunlap wrote:
Superpage support and PVHVM.
Signed-off-by: George Dunlap
---
CC: Ian Jackson
CC: Wei Liu
CC: Andrew Cooper
CC: Jan Beulich
CC: Stefano Stabellini
CC: Konrad Wilk
CC: Tim Deegan
CC: Julien Grall
---
SUPPORT.md | 21 ++
flight 116217 seabios real [real]
http://logs.test-lab.xenproject.org/osstest/logs/116217/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-qemuu-ws16-amd64 17 guest-stop fail REGR. vs. 115539
Tests which are failing
George Dunlap writes ("Re: [BUG] Error applying XSA240 update 5 on 4.8 and 4.9
(patch 3 references CONFIG_PV_LINEAR_PT, 3285e75dea89, x86/mm: Make PV linear
pagetables optional)"):
> These are two different things. Steve's reluctance to backport a
> potentially arbitrary number of non-security-r
This run is configured for baseline tests only.
flight 72454 linux-3.18 real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/72454/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-armhf-armhf-examine 11 examine-serial/bo
Hi Ian,
On 14/11/17 14:57, Ian Jackson wrote:
Julien Grall writes ("Re: [PATCH] tools: xentoolcore_restrict_all: Do deregistration
before close"):
I think this is 4.10 material, xentoolcore was introduced in this
release and it would be good to have it right from now. I want to
confirm that yo
On Wed, Nov 15, 2017 at 4:28 PM, Andre Przywara
wrote:
> Hi,
Hi Andre, Jassi
Thank you for your comments!
>
> On 14/11/17 20:46, Oleksandr Tyshchenko wrote:
>> On Tue, Nov 14, 2017 at 12:49 PM, Andre Przywara
>> wrote:
>>> Hi,
>> Hi Andre
>>
>>>
>>> On 13/11/17 19:40, Oleksandr Tyshchenko wrote
Hi,
On 15/11/17 14:16, Andrew Cooper wrote:
On 15/11/17 14:10, Jan Beulich wrote:
On 15.11.17 at 14:47, wrote:
The altp2m_vcpu_enable_notify subop handler might skip calling
rcu_unlock_domain() after rcu_lock_current_domain(). Albeit since both
rcu functions are no-ops when run on the curren
Hi Stefano,
On 16/11/17 01:17, Stefano Stabellini wrote:
On Fri, 10 Nov 2017, Andre Przywara wrote:
Hi,
On 26/10/17 01:14, Stefano Stabellini wrote:
On Thu, 19 Oct 2017, Andre Przywara wrote:
gic_clear_pending_irqs() was not only misnamed, but also misplaced, as
a function solely dealing wit
On 16/11/17 12:39, Manish Jaggi wrote:
On 11/16/2017 5:23 PM, Julien Grall wrote:
Hi Manish,
On 16/11/17 11:46, Manish Jaggi wrote:
On 11/16/2017 5:07 PM, Julien Grall wrote:
On 16/11/17 07:39, Manish Jaggi wrote:
On 11/14/2017 6:53 PM, Julien Grall wrote:
3. IORT for Dom0
-
On 11/16/2017 01:04 PM, Jan Beulich wrote:
On 16.11.17 at 13:30, wrote:
>> On Thursday, 16 November 2017 8:30:39 PM AEDT Jan Beulich wrote:
>> On 15.11.17 at 23:48, wrote:
I am having trouble applying the patch 3 from XSA240 update 5 for xen
stable 4.8 and 4.9
xsa240 0003
>>> On 16.11.17 at 13:30, wrote:
> On Thursday, 16 November 2017 8:30:39 PM AEDT Jan Beulich wrote:
>> >>> On 15.11.17 at 23:48, wrote:
>> > I am having trouble applying the patch 3 from XSA240 update 5 for xen
>> > stable 4.8 and 4.9
>> > xsa240 0003 contains:
>> >
>> > CONFIG_PV_LINEAR_PT
>> >
Hi Julien
22nd works good for us
From: Julien Grall
Sent: Thursday, November 16, 2017 1:54:51 PM
To: xen-devel; Edgar E. Iglesias; lars.ku...@citrix.com;
scamp...@codeaurora.org; stewart.hildebr...@dornerworks.com; Stefano
Stabellini; anastassios.na...@onapp.c
On 11/16/2017 5:23 PM, Julien Grall wrote:
Hi Manish,
On 16/11/17 11:46, Manish Jaggi wrote:
On 11/16/2017 5:07 PM, Julien Grall wrote:
On 16/11/17 07:39, Manish Jaggi wrote:
On 11/14/2017 6:53 PM, Julien Grall wrote:
3. IORT for Dom0
-
IORT for Dom0 is based on host io
On Thursday, 16 November 2017 8:30:39 PM AEDT Jan Beulich wrote:
> >>> On 15.11.17 at 23:48, wrote:
> > Hi,
> >
> > I am having trouble applying the patch 3 from XSA240 update 5 for xen
> > stable 4.8 and 4.9
> > xsa240 0003 contains:
> >
> > CONFIG_PV_LINEAR_PT
> >
> > from:
> >
> > x86/mm: M
flight 116215 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/116215/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-freebsd10-amd64 7 xen-boot fail REGR. vs. 115643
test-amd64-i386-xl-
If the host GICv3 redistributor reports that the pending table cannot
use shareable memory, we try to drop the cacheability attributes as
well. However we fail horribly in doing computer science 101 bit
masking, effectively clearing the whole register instead of just a few
bits.
Fix this by removin
Hi all,
Apologies I was meant to organize the call earlier.
I would suggest to have the next community call on Wednesday 22nd
November 5pm GMT. Does it sound good?
Do you have any specific topic you would like to discuss?
Cheers,
--
Julien Grall
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