Hi Jason,
On Fri, May 30, 2025 at 10:13:28AM -0300, Jason Gunthorpe wrote:
> On Thu, May 29, 2025 at 03:08:39PM -0700, Shyam Saini wrote:
> > > How does your platform work at all? Isn't 0x0800 physical memory in
> > > your address map?
> >
> > unfornately, this 0x0800 physical address is
On Thu, May 29, 2025 at 03:08:39PM -0700, Shyam Saini wrote:
> > How does your platform work at all? Isn't 0x0800 physical memory in
> > your address map?
>
> unfornately, this 0x0800 physical address is not in our address map
Is your issue PCI related, do you have a PCI switch without A
On Thu, May 29, 2025 at 03:38:15PM -0300, Jason Gunthorpe wrote:
> On Thu, May 29, 2025 at 11:22:19AM -0700, Shyam Saini wrote:
> > > All IOVA that the platform cannot DMA from should be reported in the
> > > reserved_regions file as "reserved". You must make your platform
> > > achieve this.
> >
On Thu, May 29, 2025 at 11:22:19AM -0700, Shyam Saini wrote:
> > All IOVA that the platform cannot DMA from should be reported in the
> > reserved_regions file as "reserved". You must make your platform
> > achieve this.
>
> so should it be for all the iommu groups?
>
> no_dma_mem
On Tue, May 27, 2025 at 09:04:25PM -0300, Jason Gunthorpe wrote:
> On Tue, May 27, 2025 at 01:54:28PM -0700, Shyam Saini wrote:
> > > The above is the only place that creates a IOMMU_RESV_SW_MSI so it is
> > > definately called and used, right? If not where does your
> > > IOMMU_RESV_SW_MSI come fr
On Wed, May 28, 2025 at 03:42:55PM -0700, Jacob Pan wrote:
> > All IOVA that the platform cannot DMA from should be reported in the
> > reserved_regions file as "reserved". You must make your platform
> > achieve this.
> >
> Just to double confirm, the expected reserved region should be marked as
Hi Jason,
On Tue, 27 May 2025 21:04:25 -0300
Jason Gunthorpe wrote:
> On Tue, May 27, 2025 at 01:54:28PM -0700, Shyam Saini wrote:
> > > The above is the only place that creates a IOMMU_RESV_SW_MSI so
> > > it is definately called and used, right? If not where does your
> > > IOMMU_RESV_SW_MSI c
On Tue, May 27, 2025 at 01:54:28PM -0700, Shyam Saini wrote:
> > The above is the only place that creates a IOMMU_RESV_SW_MSI so it is
> > definately called and used, right? If not where does your
> > IOMMU_RESV_SW_MSI come from?
>
> code tracing and printks in that code path suggests
> iommu_dma
On Sun, May 25, 2025 at 04:07:03PM -0300, Jason Gunthorpe wrote:
> On Tue, May 20, 2025 at 03:42:24PM -0700, Shyam Saini wrote:
> > Hi Jason,
> >
> > apologies for the delayed response.
> >
> > > On Wed, Apr 16, 2025 at 11:04:27AM -0700, Jacob Pan wrote:
> > >
> > > > Per last discussion "SMMU d
On Tue, May 20, 2025 at 03:42:24PM -0700, Shyam Saini wrote:
> Hi Jason,
>
> apologies for the delayed response.
>
> > On Wed, Apr 16, 2025 at 11:04:27AM -0700, Jacob Pan wrote:
> >
> > > Per last discussion "SMMU driver have a list of potential addresses and
> > > select the first one that does
Hi Jason,
apologies for the delayed response.
> On Wed, Apr 16, 2025 at 11:04:27AM -0700, Jacob Pan wrote:
>
> > Per last discussion "SMMU driver have a list of potential addresses and
> > select the first one that does not intersect with the non-working IOVA
> > ranges.". If we don't know what
Hi Jason,
On Wed, 16 Apr 2025 15:17:59 -0300
Jason Gunthorpe wrote:
> On Wed, Apr 16, 2025 at 11:04:27AM -0700, Jacob Pan wrote:
>
> > Per last discussion "SMMU driver have a list of potential addresses
> > and select the first one that does not intersect with the
> > non-working IOVA ranges.".
On Wed, Apr 16, 2025 at 11:04:27AM -0700, Jacob Pan wrote:
> Per last discussion "SMMU driver have a list of potential addresses and
> select the first one that does not intersect with the non-working IOVA
> ranges.". If we don't know what the "non-working IOVA" is, how do we
> know it does not in
Hi Jason,
On Thu, 10 Apr 2025 20:00:08 -0300
Jason Gunthorpe wrote:
> On Thu, Apr 10, 2025 at 03:50:27PM -0700, Shyam Saini wrote:
> >
> > Hi,
> >
> > Currently, the MSI_IOVA_BASE address is hard-coded to 0x8000,
> > assuming that all platforms have this address available for MSI IOVA
> >
On Thu, Apr 10, 2025 at 03:50:27PM -0700, Shyam Saini wrote:
>
> Hi,
>
> Currently, the MSI_IOVA_BASE address is hard-coded to 0x8000,
> assuming that all platforms have this address available for MSI IOVA
> reservation. However, this is not always the case, as some platforms
> reserve this a
Hi,
Currently, the MSI_IOVA_BASE address is hard-coded to 0x8000,
assuming that all platforms have this address available for MSI IOVA
reservation. However, this is not always the case, as some platforms
reserve this address for other purposes. Consequently, these platforms
cannot reserve th
16 matches
Mail list logo
