[v8-users] Re: how will simd256 in V8 be used

2023-02-16 Thread Yahan Lu
I think you can follow these https://chromium-review.googlesource.com/q/v8:12716 在2023年2月15日星期三 UTC+8 17:38:16 写道: > I found that x86 assembler includes ymm registers, which are 256-bits in > length. I am wondering what this will be used in V8. > V8 does not have auto-vectorization, and the si

[v8-users] Re: bazel build v8 from source code failed with `js-temporal-objects.cc`

2023-02-21 Thread Yahan Lu
Can you try ninja to build it? 在2023年2月22日星期三 UTC+8 03:40:31 写道: > Hi, > > I'm trying to include v8 as third party lib in our repo. When I bazel > build it from source code, I keep get the error of > ``` > /5ef69e4d05773e46149703ae8aeafaec/external/v8/BUILD.bazel:3587:11: > Compiling src/obje

[v8-users] Re: questions regarding v8's riscv and arm simulator

2023-11-29 Thread Yahan Lu
Hi Can you give me your test code navier-strokes.js? 在2023年11月29日星期三 UTC+8 16:04:28 写道: > Hi, > > I'm using V8's simulator to run riscv and arm. My question is why the > values of icount_ are so different between riscv simulator and arm > simulator. > One of my target benchmarks is navier-str

[v8-users] Re: questions regarding v8's riscv and arm simulator

2023-12-07 Thread Yahan Lu
I run navier-strokes.js on commit id c39bb5225d771e130468d5d75a9988944950e95e My result riscv64 : 19061085 arm64: 15599557 Riscv64 run more 22% instrs than arm64. I think it meets expectation. Nowadays riscv64 on v8 using isa rv64gc, that don't has B extension. Riscv64 need more instr to im