[USRP-users] Running neural network ex_1layer example on x310

2018-04-12 Thread Francesco Restuccia via USRP-users
Hi all, I was trying to run the ex_1layer example for neural networks on FPGA. Although the flowgraph starts, I get a series of ''timeout on chan0" and no output is produced. Any suggestion? Thanks, Francesco Below is my code: ### #!/usr/bin/en

[USRP-users] [RFNOC] Schimdl & Cox off-the-shelf block fails timing constraints on X310

2018-04-16 Thread Francesco Restuccia via USRP-users
Hi all, I am trying to add the schmidlcox, fft and and eq to my X310. Looks like the S&C block does not meet timing constraints. This is the report from Vivado. Any help would be much appreciated, thank you... Francesco ---

[USRP-users] X310 image 8 bytes too large with default image

2019-09-30 Thread Francesco Restuccia via USRP-users
Hi guys, I am responding to the following thread: http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2018-August/057669.html I am having the same problem while running the uhd_image_builder.py with the default images for X310. See below: frank@frank-iMac:/opt/uhd/host/build/exampl

[USRP-users] uhd_usrp_loader script defaults firmware to pre-built bin file

2019-09-30 Thread Francesco Restuccia via USRP-users
Dear all, I am trying to load my customized firmware into an USRP N210. I have tried the following but it defaults to the default image, regardless of the input: frank@frank-iMac:~$ uhd_image_loader --args="type=usrp2,addr=192.168.10.2" --fw-path="/opt/uhd/firmware/usrp2/build/usrp2p/usrp2p

[USRP-users] uhd_usrp_loader script defaults firmware to pre-built bin file

2019-10-01 Thread Francesco Restuccia via USRP-users
Hi Marcus, This is the output of the command: frank@frank-iMac:~$ which uhd_image_loader /opt/uhd_gnuradio_installs/bin/uhd_image_loader And yes, the file should be ok: frank@frank-iMac:/opt/uhd$ ls -la /opt/uhd/firmware/usrp2/build/usrp2p/usrp2p_txrx_uhd.bin -rwxr-xr-x 1 frank frank 16383 Se

[USRP-users] Problems with N210 FPGA bitfile -- image not valid?

2019-10-07 Thread Francesco Restuccia via USRP-users
Hi all, I've built an N210 image using the source code provided by Ettus-- When I try to burn the FPGA image onto the N210, though, I receive the following error: frank@frank-iMac:~$ uhd_image_loader --args="type=usrp2,addr=192.168.10.2" --no-fw --fpga-path=/home/frank/u2plus.bit [INFO] [UH

Re: [USRP-users] Problems with N210 FPGA bitfile -- image not valid?

2019-10-07 Thread Francesco Restuccia via USRP-users
to a .bin file with this utility: https://github.com/EttusResearch/uhd/blob/UHD-3.14/mpm/python/usrp_mpm/fpga_bit_to_bin.py On Mon, Oct 7, 2019 at 12:02 PM Marcus D. Leech via USRP-users mailto:usrp-users@lists.ettus.com>> wrote: On 10/07/2019 11:19 AM, Francesco Restuccia via USRP

[USRP-users] Some questions regarding DDC implementation

2019-10-11 Thread Francesco Restuccia via USRP-users
Dear all, I have some questions regarding the DDC implementation (ddc_chain.v, usrp2): 1) Why do we need two half-band filters (one large and one small) after the CIC? What is their purpose? Can’t we use just one half-band? 2) What is the purpose of the scale factor multiplication after hb2? Wha

Re: [USRP-users] Some questions regarding DDC implementation

2019-10-12 Thread Francesco Restuccia via USRP-users
a function of the decimation (all of this because we're doing fixpoint math). We try and negate this as much as possible by multiplying the output with a compensation factor. -- M On Fri, Oct 11, 2019 at 10:57 AM Francesco Restuccia via USRP-users mailto:usrp-users@lists.ettus.com>> wrote: