per...@o2.pl wrote:
> Hello,
>
> It seems that I have to answer my own question. Currently I succeeded to get
> 245.76MSamp/s in benchmark_rate for single channel with DPDK over single
> 10Gbit link for an RFSoC device similar to USRP X410.
>
> My setup:
>
> * UHD 4.3, Ubuntu 20.04, DPDK 19.11 i
You mentioned you don't receive any ready. Do you mean that the tready
signal never asserts on your output port? It is not allowed in AXI-Stream
to wait for tready to assert before asserting tvalid. Some devices will
assert tready before tvalid asserts, but some won't. You need to assert
tvalid whe
Yes. Take a look at the gain OOT RFNoC block example:
https://github.com/EttusResearch/uhddev/blob/master/host/examples/rfnoc-example/fpga/rfnoc_block_gain/rfnoc_block_gain_tb.sv
For example, here it generates test input data:
https://github.com/EttusResearch/uhddev/blob/1be0f33bf32fd319facc654cb5
Hello,
I managed to receive the respective values of m_ready and s_valid. The
problem I think was that I was doing a conversion to chdr-payload and I was
not receiving data. Now I have done a chdr to chdr data and I am receiving
the expected values of these flags. Now I have the problem of how to
