[USRP-users] Re: Bus errors and UHD exceptions with simple I/Q recorder

2022-08-15 Thread Marcus D. Leech
On 2022-08-14 20:57, Nikos Balkanas wrote: Aaaah, it's the dreaded max_samps_per_buffer:( Yup, you need to make your read buffer aligned to max_samps_per_buffer... HTH Nikos Also, could we confirm that the stream is being set-up for sc16 on the *host* side as well?  The default   is, AFAIR, "f

[USRP-users] X310 won't boot without reflash

2022-08-15 Thread Dave NotTelling
Apologies if this is a repost. I don't think my original message made it to the list for some reason. I recently got my hands on a used x310. It seems to work well, but for some reason will not boot on its own. Vivado hardware manager shows the device as not being programmed, and the network in

[USRP-users] Re: X310 won't boot without reflash

2022-08-15 Thread Marcus D. Leech
On 2022-08-15 10:34, Dave NotTelling wrote: Apologies if this is a repost.  I don't think my original message made it to the list for some reason. I recently got my hands on a used x310.  It seems to work well, but for some reason will not boot on its own.  Vivado hardware manager shows the d

[USRP-users] Re: X310 won't boot without reflash

2022-08-15 Thread Dave NotTelling
Marcus, It was crazy cheap (~$650), and reflashing on power up isn't hard :) It's a fun toy for learning about RFNoC and just FPGA fun in general. Came with two 40 MHz WBX boards. Is there a part number for the flash? Is it something that can be popped off with a hot air gun? I think it d

[USRP-users] Re: X310 won't boot without reflash

2022-08-15 Thread Marcus D. Leech
On 2022-08-15 10:47, Dave NotTelling wrote: Marcus, It was crazy cheap (~$650), and reflashing on power up isn't hard :)  It's a fun toy for learning about RFNoC and just FPGA fun in general.  Came with two 40 MHz WBX boards. Is there a part number for the flash?  Is it something that ca

[USRP-users] Re: X310 won't boot without reflash

2022-08-15 Thread Dave NotTelling
Marcus, Thanks for the link! I didn't have any terminators on hand over the weekend, but will try that today. Appreciate the suggestion! -Dave On Mon, Aug 15, 2022 at 10:51 AM Marcus D. Leech wrote: > On 2022-08-15 10:47, Dave NotTelling wrote: > > Marcus, > > It was crazy cheap (~

[USRP-users] Re: Bus errors and UHD exceptions with simple I/Q recorder

2022-08-15 Thread Chris Wozny
Marcus, I was specifying SC16 on host and SC12 over-the-wire via: uhd::stream_args_t stream_args("sc16","sc12"); // 16-bit integers on host, 12-bit over-the-wire - Chris On Mon, Aug 15, 2022 at 10:25 AM Marcus D. Leech wrote: > On 2022-08-14 20:57, Nikos Balkanas wrote: > > Aaaah, it's the dr

[USRP-users] Re: Bus errors and UHD exceptions with simple I/Q recorder

2022-08-15 Thread Marcus D. Leech
On 2022-08-15 16:50, Chris Wozny wrote: Marcus, I was specifying SC16 on host and SC12 over-the-wire via: uhd::stream_args_t stream_args("sc16","sc12"); // 16-bit integers on host, 12-bit over-the-wire You might try sc16 on the wire-side as well--sc12 is actually somewhat more computational

[USRP-users] Re: Bus errors and UHD exceptions with simple I/Q recorder

2022-08-15 Thread woznych
I tweaked it to make sure the buffer size is a multiple of “rx_stream->get_max_num_samps()” and haven’t been able to get the issue to occur. Will require more exhaustive testing, but looks promising so far since I was able to reproduce the seg fault behavior just prior to trying this change out