[USRP-users] Re: rfnoc error at building graph and setting sample rate

2021-03-19 Thread Chang, Kaixin
when I use radio_ctrl->set_rate() of rfnoc c++ api, I get the error, Setting RX Rate: 10.00 Msps... Actual RX Rate: 200.00 Msps... [WARNING] [0/Radio#1] Requesting invalid sampling rate from device: 10 MHz. Actual rate is: 200 MHz. I use X310 with 2 CBX120 daughterboards and I can set

[USRP-users] Re: X310 with dual TwinRX set up

2021-03-19 Thread Oliver Towlson
Hi Rob Many thanks for your response. The change in syntax seemed to do the trick! Oliver From: Rob Kossler [mailto:rkoss...@nd.edu] Sent: 16 March 2021 18:22 To: Oliver Towlson Cc: Marcus D Leech ; USRP-users@lists.ettus.com; Tom Stacey Subject: Re: [USRP-users] Re: X310 with dual TwinRX set

[USRP-users] rfnoch how to build graph just to transmit and receive by using Tx/Rx and Rx2 port on the same daughterboard

2021-03-19 Thread Chang, Kaixin
Dear all, I have problem building rfnoc graph to use Tx/Rx and Rx2 ports on one single daughter board. If I connect 0/DUC#0:0==>0/Radio#0:0 0/Radio#0:1==>0/DDC#0:1 and connect tx_stream to 0/DUC#0:0 and 0/DDC#0:1 to rx_stream I get an error [ERROR] [RFNOC::GRAPH::DETAIL] Node 0/Radio#0c

[USRP-users] Re: rfnoc error at building graph and setting sample rate

2021-03-19 Thread Rob Kossler
The X310 radio itself does not change rates (as you have found out). The DDC can change the sample rate. Try calling this function with the DDC control. Rob On Fri, Mar 19, 2021 at 6:16 AM Chang, Kaixin wrote: > when I use radio_ctrl->set_rate() of rfnoc c++ api, I get the error, > > Setting R

[USRP-users] Re: rfnoch how to build graph just to transmit and receive by using Tx/Rx and Rx2 port on the same daughterboard

2021-03-19 Thread Rob Kossler
Hi Kasim, I just tried to run with the graph you described and it worked fine on my N310. I did not get that error message. Rob On Fri, Mar 19, 2021 at 6:24 AM Chang, Kaixin wrote: > Dear all, > > > I have problem building rfnoc graph to use Tx/Rx and Rx2 ports on one > single daughter board. >

[USRP-users] Re: N3xx internal ethernet interface

2021-03-19 Thread Ryan Marlow
Related to my previous inquiry so continuing this thread... Trying to get UHD to find the CHDR endpoint at the internal_eth core and thinking I understand how UHD 4.0 works but struggling to see what's going wrong. I remember encountering this situation in past N3xx experience but can't remember ex

[USRP-users] Re: x310 PPS issues

2021-03-19 Thread Richard J. Muri
I figured out the issue, it’s quite silly actually. The USRP was picking the PPS signal, the duty cycle just wasn’t wide enough to notice the LED lighting up. I just had to configure the NTP server to give a slightly wider pulse. Problems with desynchronization were an issue with my application

[USRP-users] Re: N3xx internal ethernet interface

2021-03-19 Thread Ryan Marlow
Nevermind. I think I resolved my issue. The CHDR interface with int0 was coming up fine, I did something dumb on the FPGA side where the n3xx_db_fe_core ctrl port connections were disconnected from the Radio core. Hence the error: > *[ERROR] [RFNOC::GRAPH] Caught exception while initializing graph

[USRP-users] Adding DmaFIFO block like FFT block in UHD 4 guide.

2021-03-19 Thread jcasallas2019
hi all, I am trying to add DmaFIFO block following UHD 4 Getting started guide in the same way the FFT block was added, but when looking into gr-ettus/grc/ folder, I did not find any ettus_rfnoc_dmaFIFO yaml file like the rest of default blocks.. This is what I found in /usr/local/share/… an