[USRP-users] Bug in timed switching of sample rate

Hello everyone, I am experencing some issues when switching the sample rate. I have two synchronized USRP X310 with a total of 4 TwinRX. I am doing timed commands to jump around in the spectrum with all receivers at the same frequency (SIMO stuff). I also need to switch sample rates in between.

[USRP-users] Update USRP E310

Hello tell me how to update the E310 to e3xx-release-4? Thanks in advance. ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

[USRP-users] RFNoc Blocks with Xilinx IP

I have been following the following blog post: http://www.synchronouslabs.com/blog/creating-a-custom-rfnoc-block-with-using -xillinx-ip Near the end, it instructs the user to add the Xilinx IP files (.xci for example) to the UHD project directory. However, as this is a clone of the Ettu

Re: [USRP-users] Update USRP E310

https://files.ettus.com/e3xx_images/README On Fri, 2018-07-20 at 13:21 +0300, Ivan Zahartchuk via USRP-users wrote: > Hello tell me how to update the E310 to e3xx-release-4? > Thanks in advance. > ___ > USRP-users mailing list > USRP-users@lists.ettus.co

Re: [USRP-users] Synchronizing channels in USRP X310

Hi, all.Can anyone confirm this please?Thanks! ---원본메일---보낸사람 : Hojoon Yang via USRP-users 받는사람: usrp-users 보낸날짜: 2018-07-15 19:36:08 GMT +0900 (ROK)제목: [USRP-users]Synchronizing channels in USRP X310 Hi, I'm using a USRP X310 + 2 UBX-160 for 2x

Re: [USRP-users] B205mini debug register

Any thoughts on the above? Hello, Is there a non-invasive way to monitor a debug register in the b205mini FPGA, with minimal/no changes to software. To give some background, I am looking at making some changes to the B205 mini HDL and trying to see if I can use an existing debug/unused register

Re: [USRP-users] RFNoc Blocks with Xilinx IP

Hello Brendon: Could you describe in more detail what you're trying to do, or how you want to add your Xilinx IP? Are you still using "rfnocmodtool" to add your custom RFNoC blocks? The flow described in that document, and in the Application Note below, is the primary/intended way to add IP to a

Re: [USRP-users] RFNoc Blocks with Xilinx IP

Hi Brendon, I have an example repo that shows how to use out-of-tree makefiles with xilinx IP (.xci definitions): github.com/ejk43/rfnoc-ootexample Please feel free to copy this format- a few other rfnoc developers on the mailing list indicated it has worked for them too. Note that the rfnoc bl

Re: [USRP-users] Synchronizing channels in USRP X310

On 07/20/2018 10:29 AM, Hojoon Yang via USRP-users wrote: Hi, all. Can anyone confirm this please? Thanks! No, you don't need to set the sampling-rate under control of set_command_time() ---원본메일--- 보낸사람 : Hojoon Yang via USRP-users 받는사

[USRP-users] SFP Transceivers for N310 1/10Gbps Fiber Ethernet

Hi, I am working on a project where several N310s are connected to a fiber-Ethernet switch. The fibers are of single mode with length from 1km to 10km. My problem is selecting the right SFP transceivers. Currently, I used the official SFP to RJ45 converter (come from Ettus with N310) followed by