Re: [USRP-users] Building FPGA image containing OOT blocks using Vivado

2017-10-21 Thread Nicolas Cuervo via USRP-users
Hello Luis Angel, However, when trying to create the same image from Vivado modifying the > rfnoc_ce_auto_inst_x300.v file by including my own block and adding the > dependent Verilog files to the design, even though I can run the > synthesis/implementation and generate a bit file, after loading

Re: [USRP-users] Bug about for E312

2017-10-21 Thread Marcus Müller via USRP-users
Dear Jon, that first link points to your own GMail account. We can't do anything with that, I'm afraid. Please find the email you're referring to, cite it directly, or link to it on http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/ Thank you! Marcus M On 20.10.2017 03:20, liu Jong v

Re: [USRP-users] interpretation of received signal

2017-10-21 Thread Marcus Müller via USRP-users
Hi Nirmala, I'm confused, so what *calibrated measurement device* did you use to get "-80 dbm to -100 dbm"? As Marcus L has pointed out, the values you get from the USRP are *not* relative to a physical unit. Please simply don't think the plots that *any* software gives you have something to do w

Re: [USRP-users] interpretation of received signal

2017-10-21 Thread Marcus D. Leech via USRP-users
On 10/21/2017 09:20 AM, Marcus Müller via USRP-users wrote: Hi Nirmala, I'm confused, so what *calibrated measurement device* did you use to get "-80 dbm to -100 dbm"? As Marcus L has pointed out, the values you get from the USRP are *not* relative to a physical unit. Please simply don't th

Re: [USRP-users] interpretation of received signal

2017-10-21 Thread Kevin McGuire via USRP-users
My knowledge is limited, therefore, read this with a grain of salt. However, I wanted to try to help and if something I say does not make sense then double-check it or someone else may come along and correct me. I had this same problem when I started with these types of systems. I had trouble unde

Re: [USRP-users] interpretation of received signal

2017-10-21 Thread Marcus D. Leech via USRP-users
On 10/21/2017 11:59 AM, Kevin McGuire via USRP-users wrote: My knowledge is limited, therefore, read this with a grain of salt. However, I wanted to try to help and if something I say does not make sense then double-check it or someone else may come along and correct me. I had this same proble

[USRP-users] Unexpected sample drift with X300 and X310

2017-10-21 Thread Kai-Uwe Storek via USRP-users
Hey, the attached flowgraph simply generates a sine which is transmitted and received by the same USRP in a loop (30dB attenuation + coax cable between tx and rx port). I used the following USRPs: - B210 - X300 (1G Eth) - X310 (1G Eth) On the Rx side I just added a time sink to view the complex

Re: [USRP-users] Unexpected sample drift with X300 and X310

2017-10-21 Thread Marcus Müller via USRP-users
Dear Kai, to answer your explicit question first: > I assume that the drifting effect is caused by lost or added samples > on the Tx side. > Are my assumptions about the expected behavior correct? unless you're seeing "U" on the console, no, that's not the case: there's no lost samples. If it w

Re: [USRP-users] Removing DC offset on USRP B200

2017-10-21 Thread Marcus Müller via USRP-users
Hi Oliver, yep, GNU Radio is just discrete signals, just like in an FPGA – but with software buffers between software functions :) That especially means that this is all complex baseband – so, to represent 20 MHz (= 0.5 MHz · 40), i.e. -10 to +10 MHz, you just need a sample rate of 20 MS/s. 6MS/

Re: [USRP-users] Unexpected sample drift with X300 and X310

2017-10-21 Thread Kai-Uwe Storek via USRP-users
Hey Marcus, thanks for the fast reply! 1) I've no Us or something else - everything is fine. 2) Your suggestion (vector source with one period of my sequence) is exactly what I'm doing in my project (where I noticed the problem). The sine source was just to create a simple example graph for the

Re: [USRP-users] interpretation of received signal

2017-10-21 Thread Nirmala Soundararajan via USRP-users
Thanks for a very good explanation on power levels Marcus. Actually I think I got the answer to what I was looking for. The "faintest reasonable signal level" that a typical SDR can process! (Typically around -120 to -130 dBm).! In my application, I have a bunch of channels through which I can