Hi Altug and Jacob,
Yes, the most recent Visual Studio we are actively supporting is 2015. We
will support 2017 with an upcoming release but as you note Jacob, Boost and
other dependencies are still catching up themselves.
Jacob, Boost 1.64 is not officially supported but great to hear it is
work
Hi Nate,
Sure, our company is using a custom UHD and I will have to redact part of
the text. When I run the command it outputs:
003.009.001**
This x300 has always been problematic. We have a different X300 that works
fine with this setup. The problem occurs when I duplicate the setup for use
with
t.com/antivirus
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Message: 2
Date: Wed, 5 Jul 2017 11:55:05 -0700
From: Martin
On 05/21/2017 03:44 AM, Marcus Müller via USRP-users wrote:
> Hi Felipe,
>
> I don't know whether someone else reacted yet, but I don't want to leave
> you hanging in there; thus:
>
>> Dear GNU Radio group,
> oh well, this is the usrp-users mailing list; GNU Radio is a separate
> Free & Open Sour
Hi,
I am trying to test a custom block built using rfnocmodtool and I get
this error when I run make noc_block__tb
*Setting up a 64-bit FPGA build environment for the USRP-X3x0...*
*- Vivado: Found (/opt/Xilinx/Vivado/2015.4/bin)*
*- Vivado HLS: Found (/opt/Xilinx/Vivado_HLS/2015.4/bin)*
*Env
Hello -
I currently have a USRP E310/E312 and using the RFNOC - devel fpga, I was able
to achieve a rate of 26 Msps max when the running rx_samples_to_file. I am
planning on purchasing another USRP mainly based upon the device that will
provide the highest RX/TX rates. Can you list me the dev
I have some code from a previous coworker that I would like to take
advantage of. Currently it is VHDL and their top block (which I am
calling), has things like:
USE WORK.TYPES.ALL;
USE WORK.HARDWARE.ALL;
USE WORK.MATH.ALL;
USE WORK.UTIL.ALL;
USE WORK.FILTERS.ALL;
USE WORK.RESAMPLERS.ALL;
I un
Hello all,
Is anyone using the B210 on a VirtualBox VM? What would the USB filter
settings be for that setup?
Thanks and regards,
Saeid
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Just be sure that you're using the latest version of VirtualBox, 5.1.22,
and enable USB 3.0 support.
For running UHD and/or GNU Radio, your VM should have 2 GB memory, and 4 GB
would be ideal.
--Neel Pandeya
On 6 July 2017 at 11:47, Saeid Hashemi via USRP-users <
usrp-users@lists.ettus.com> w
I meant to add that you will also still need to set the udev rules in the
VM too (I'm assuming that you're using Ubuntu 16.04 as the guest OS).
https://files.ettus.com/manual/page_transport.html#transport_usb_udev
--Neel Pandeya
On 6 July 2017 at 11:51, Neel Pandeya wrote:
> Just be sure th
Hi Saeid,
For the filter rule use VID: 2500 PID: 0020
Also you may need to install the VirtualBox Extension pack.
Regards,
Nate Temple
> On Jul 6, 2017, at 11:53 AM, Neel Pandeya via USRP-users
> wrote:
>
> I meant to add that you will also still need to set the udev rules in the VM
> too
If you have the option to use uhd_siggen_gui (it's a GNU Radio tool),
that should run through all the right steps to set up synced Tx. Then
you'd know if it's a SW issue.
-- M
On 05/19/2017 08:16 AM, Vladica Sark via USRP-users wrote:
> Hi Julian,
>
> I am using Teledyne LeCroy HDO9404. I use UH
Mareike,
the reason for the delays is that your software is polling the GPIO, and
that goes over network. You're adding in network latency, and SW
scheduling latency.
Also, with the DDC, once a packet leaves the computer, it needs to go
through various stages before it reaches the ADC (after the
Thanks for the pointers guys, I've installed the extension pack and
everything seems to work. At least UHD can find my USRP. I'm on Ubuntu
14.04.
On Thu, Jul 6, 2017 at 3:13 PM, Nate Temple wrote:
> Hi Saeid,
>
> For the filter rule use VID: 2500 PID: 0020
>
> Also you may need to install the
Daniel,
all of our devices are listed (with rates) on our website:
https://www.ettus.com/product
The X-series has the highest achievable rates. What you can sustain
depends on many things, including the computer running UHD and the
implementation. An E-Series typically won't be able to sustain mo
Hello -
In order to load a custom FPGA, you run the python script "uhd_image_loader
--args="type=usrp2,addr=" --fw-path=""
--fpga-path=""" which is then automatically loaded at runtime. Is
that on-board storage volatile? Will I have to run this python script every
time I reboot the USRP N-se
Hello Daniel,
No, the storage is non-volatile. The script only needs to be run when
updating the FPGA.
Regards,
Derek
On Thu, Jul 6, 2017 at 9:40 PM, Cho, Daniel J (332C) via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello –
>
>
>
> In order to load a custom FPGA, you run the python scr
You can use VHDL in RFNoC blocks, but it can be a bit tricky to embed.
We might have an example coming out in a few weeks, but not right now.
Cheers,
Martin
On 07/06/2017 11:44 AM, Jason Matusiak via USRP-users wrote:
> I have some code from a previous coworker that I would like to take
> advanta
Hi all,
running Gnuradio 3.7.10.2 and UHD 4.0.0 rfnoc-devel latest commit (tried
earlier versions too). I've got a simple tx/rx flowgraph going on. The
simple description is:
Random input data -> Pack 1 Bit->Chunks to Symbols->Interpolating FIR
Filter->USRP Sink
USRP Source-> Polyphase Clock Syn
A quick update to this question with more info. I did some further analysis
by capturing the received I/Q data from the USRP Source block when
transmitting the BPSK that works without errors (symbols are 0.707+0.707j,
-0.707-0.707j) and also when using the BPSK that gives errors (symbols are
+1/-1)
On 07/06/2017 09:36 PM, Michael Carosino via USRP-users wrote:
A quick update to this question with more info. I did some further
analysis by capturing the received I/Q data from the USRP Source block
when transmitting the BPSK that works without errors (symbols are
0.707+0.707j, -0.707-0.707j)
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