Thank you. Added lines from Makefile and it worked.
On Thu, Sep 28, 2017 at 4:58 PM, Nicolas Cuervo
wrote:
> Hello John,
>
> the testbench for the siggen is located at
> uhd-fpga/usrp3/lib/sim/rfnoc/noc_block_siggen/.
> It might be worth to try to add the cordic as it is being done there
> http
Hello John,
the testbench for the siggen is located at
uhd-fpga/usrp3/lib/sim/rfnoc/noc_block_siggen/. It might be worth to try to
add the cordic as it is being done there
https://github.com/EttusResearch/fpga/blob/rfnoc-devel/usrp3/lib/sim/rfnoc/noc_block_siggen/Makefile#L23
-N
On Fri, Sep 29,
Hello,
We could not find a test bench for the SIGGEN.
We did modify Makefile in testbench directory to add LIB_IP_DIR = $(BASE_DIR
)/../lib/ip
When try to build testbench we got the same error.
Thank you
On Thu, Sep 28, 2017 at 8:06 AM, Nicolas Cuervo
wrote:
> Hello John,
>
> did you base th
Hello John,
did you base the Makefile in your OOT siggen on the Makefile of the
noc_block_siggen as well?
Regards,
- Nicolas
On Thu, Sep 28, 2017 at 12:32 AM, Tom Bereknyei via USRP-users <
usrp-users@lists.ettus.com> wrote:
> John, will this be open source? We are also looking at modifying the
John, will this be open source? We are also looking at modifying the SIGGEN
to add functionality. From the name it seems you are transmitting on two
channels. We would need more, but the concept seems similar.
On Wed, Sep 27, 2017 at 18:10 John Medrano via USRP-users <
usrp-users@lists.ettus.com> w
