Hi Wade,
Do you mean build the block controller in tree? Or do you mean place the
yml file in the uhd share folder? Or ??
Rob
On Thu, Sep 17, 2020 at 12:01 PM Wade Fife via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi Jim,
>
> I'm so glad you're trying this out! This is a known issue that
Hi Jim,
I'm so glad you're trying this out! This is a known issue that we're hoping
to fix very soon, so you probably did everything right. In the meantime,
you could put your block in-tree for testing purposes. You can also
interact with it as "0/Block#0". I'll see if we can add a note to the gu
Hello,
I just updated my rfnoc workflow to UHD 4.0 this week. I've gone through the
process of creating an RFNoC block, building the corresponding FPGA image,
putting it on an E320 (had to upgrade MPM), and seeing the block is present
when executing uhd_usrp_probe. The problem is that the block
