And I was able to solve my own problem after I got over the fear of
bricking. :)
Yes, sr_write writes, while user_reg_read reads, and the offset is totally
dependent upon the FPGA implementation. (Noted for future people searching).
On Fri, Mar 9, 2018 at 8:55 AM, Taliver Heath wrote:
> We buil
We built an FPGA version off of the radio_block, re-using the registers as:
SR_BASE = 160
SR_DB_GPIO= SR_BASE + 8’d32 = 192
SR_THRESHOLD =SR_BASE + 8'd40;
...etc
RB_MISC_IO = RB_BASE + 0;
RB_SPI = RB_BASE + 1;
RB_LEDS = RB_BASE + 2;
..etc
But now I'm having a real to
