Thanks for the suggestion.
I have tried this and it turns out, the noise is mostly phase noise. Simply by
subtracting the phase of the second channel from the first, I can reduce the
noise already by about 20 dB.
May be, more reduction is possible by some sophisticated mathematics.
Best rega
Hi,
from the AD9361 data sheet I learn that the USRP B210 has two seperates LOs,
one for TX and one for RX. On the other hand, the two TX and RX channels share
one LO, respectively.
I wonder if there is an operation mode where TX and RX use the SAME LO, or some
trick to achieve this. Probabl
with gnuradio
On 07/29/2019 07:30 AM, Erik Heinz via USRP-users wrote:
Hi,
I am getting lots of underflow errors when sending with gnuradio to an X310 at
sampling rates of 50 MSps and higher. The flowchart is as simple as possible: a
signal source and a
"UHD: USRP Sink" block. Wh
sers on behalf of Erik Heinz
via USRP-users
Sent: Monday, July 29, 2019 7:30 AM
To: usrp-users@lists.ettus.com
Subject: [USRP-users] X310 slow with gnuradio
Hi,
I am getting lots of underflow errors when sending with gnuradio to an X310 at
sampling rates of 50 MSps and higher. The flowchart is a
Hi,
I am getting lots of underflow errors when sending with gnuradio to an X310 at
sampling rates of 50 MSps and higher. The flowchart is as simple as possible: a
signal source and a
"UHD: USRP Sink" block. When sending and receiving at the same time, the
performance is even worse.
The X310
Same error here for an usrp_x310_fpga_RFNOC_HG image and fpga-master.
I built it successful with fpga-f6890f227b40687b356c1e6c10d9eec2184691d0 and
Vivado 2017.4
But now my uhd version is too new:
Error: RuntimeError: Expected FPGA compatibility number 35, but got 36:
The FPGA image on yo
Have there been any efforts yet to port gr-ettus to the gnuradio master branch?
I made some trials today with gr-ettus under gnuradio-master and at least was
able to compile and install it (except for fosphor which seems to need Qt4).
Automatic conversion of the grc xml files to the yml format w
at 1:44 AM Erik Heinz via USRP-users
mailto:usrp-users@lists.ettus.com>> wrote:
Thank you all for the comments. Some summarized remarks:
Regarding the external reference:
I have no GPSDO installed and selected "Clock Source: external" in the GRC UHD
blocks. I cannot tell defini
hink these are integer boundary spurs in the PLL.
Dan Lundberg
From: USRP-users
mailto:usrp-users-boun...@lists.ettus.com>>
On Behalf Of Erik Heinz via USRP-users
Sent: Tuesday, June 4, 2019 10:10 AM
To: Torell, Kent L mailto:kent.tor...@gd-ms.com>>
Cc: usrp-users@lists.ettus
prove the phase noise, dropping 6 dB for every octave (e.g. 500 MHz would
have 20 dB lower phase noise than 5 GHz).
Kent Torell
From: USRP-users On Behalf Of Erik Heinz
via USRP-users
Sent: Monday, June 3, 2019 3:06 AM
To: usrp-users@lists.ettus.com
Subject: [USRP-users] B210: 1/f noise and LO
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