Re: [USRP-users] Speeding up build of usrp3 fpga code??

2020-08-30 Thread Eric Blossom via USRP-users
;make clean'. Instead, you have to run 'make cleanall' if you want to > remove the IP build directory, which can be necessary if you switch UHD > releases and the supported Vivado version changed. > > Jonathon > > On Sat, Aug 29, 2020 at 8:07 PM Eric Blossom via USRP

[USRP-users] Speeding up build of usrp3 fpga code??

2020-08-29 Thread Eric Blossom via USRP-users
Hi Folks, I'm in the midst of building the fpga code for the x310 on master. I'm building on a 24-thread xeon with plenty of memory. Is there a magic flag, setting, etc that enables parallelism in generating the ip (the invocations of viv_generate_ip.tcl)?? I tried make -j4 to no avail. I really