A quick update ...
I added
#include
to my includes and the following code to UHD_SAFE_MAIN:
=
uhd::device3::sptr usrp3 = usrp->get_device3();
uhd::rfnoc::dma_fifo_block_ctrl::sptr dmafifo_block_ctrl =
usrp3->get_block_ctrl(
uhd::rfnoc::block_id_t(0,"D
Brian --
Thanks so much! I sprinkled my comments in below :
On Wed, Mar 10, 2021 at 1:42 PM Brian Padalino wrote:
> On Wed, Mar 10, 2021 at 12:39 PM Doug Blackburn wrote:
>
>> Brian,
>>
>> I've seen this using UHD-3.14 and UHD-3.15.LTS.
>>
>
> The DMA FIFO block default size is set here in t
PM Brian Padalino wrote:
> On Tue, Mar 9, 2021 at 10:03 PM Doug Blackburn via USRP-users <
> usrp-users@lists.ettus.com> wrote:
>
>> Hello --
>>
>> I've got some questions re: latency with the x300 over the 10GigE
>> interface.
>>
>> If I us
uldn’t you be scaling your num_tx_samples by the time per sample when
> calculating the expectedTime?
>
> Sent from my iPhone
>
> On Mar 9, 2021, at 10:03 PM, Doug Blackburn via USRP-users <
> usrp-users@lists.ettus.com> wrote:
>
>
> Hello --
>
> I've got
Hello --
I've got some questions re: latency with the x300 over the 10GigE
interface.
If I use the latency_test example operating at a rate of 50 MSPS, I have no
issues with a latency of 1ms. The latency test receives data, examines the
time stamp, and transmits a single packet.
I have an appli
