[USRP-users] Losing phase alignment after underruns with X310 multi-USRP

2020-09-25 Thread Andreas B via USRP-users
Hi, I have a setup of several X310s connected over 10Gbit Ethernet, and synced with an Octoclock. I'm generating signals on a PC, and streaming the signals to the X310s to get coherent waveforms. For now I'm generating sinusoids where the phase of each channel slowly varies with time at differe

Re: [USRP-users] Issues with multi-usrp and UHD

2020-08-25 Thread Andreas B via USRP-users
Thanks Rob. I have registered the issue in https://github.com/EttusResearch/uhd/issues/367 and nagged their support email. Andreas. From: Rob Kossler Sent: 25. august 2020 15:59 To: Bertheussen, Andreas Cc: usrp-users Subject: Re: [USRP-users] Issues with multi-usrp and UHD Hi Andreas, You

Re: [USRP-users] Issues with multi-usrp and UHD

2020-08-25 Thread Andreas B via USRP-users
Rob I ran benchmark_rate --args=="addr0=192.168.10.2,addr1=192.168.110.2" --tx_rate 5e6 --tx_channels="0,2" And I observed the same issue I described earlier – mostly that ether channels 0,1 or channels 2,3, or very rarely channels 0,2 get enabled. When I add “skip_dram=1” to args, the channe

Re: [USRP-users] Issues with multi-usrp and UHD

2020-08-21 Thread Andreas B via USRP-users
Thanks for pointing that out Rob. I have created a std::vector enabled_channels = {0, 2}. I also changed so that those channel numbers (0 and 2) are used to tune the radios, adjust gain and check for locked LO. Code is attached. Now I still have similar issues and I observe 3 cases: ·

Re: [USRP-users] Issues with multi-usrp and UHD

2020-08-21 Thread Andreas B via USRP-users
> Can you resend the source code for the first case you describe below along > with command line? I have attached the code for a channel mapping of (0,2) in siggen.cc. I also include my CMakeLists file. Program is run without arguments; ./siggen Attached output_case_1.txt shows the program out

Re: [USRP-users] Issues with multi-usrp and UHD

2020-08-20 Thread Andreas B via USRP-users
Thanks for that suggestion Rob, I have tested this now, I now address both devices, I have changed subdev spec to "A:0 B:0" for both motherboards (lines 35, 36). Then I tried several values for stream_args.channels: I tried with stream_args.channels = (0,2). Here I expect signal on A outputs on

[USRP-users] Issues with multi-usrp and UHD

2020-08-20 Thread Andreas B via USRP-users
Hi, I have a setup with two USRP X310. Each X310 has two UBX-40 daughterboards for a total of 4 RX channels and 4 TX channels. Attached is the uhd_usrp_probe status for the USRP X310s in my setup. Both X310s are connected to an OctoClock-G, where they get fed 10MHz and 1PPS. Host computer runs F