[USRP-users] Usable bandwidth of X300 USRP with UBX-160 daughterboard

2025-02-17 Thread Brendan Horsfield
Hi All, I have a question about the usable bandwidth of the X300 USRP / UBX-160 daughterboard combo at sampling rates below 200 Msps: As I understand it, the UBX-160 receiver has an analog (hardware) filter before the ADC that limits the usable bandwidth to 160 MHz, while the ADC runs at 200 Msps

[USRP-users] Re: Reading/Write registers - Timeout

2025-02-17 Thread cyberphox
Thank you for your help David. ___ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com

[USRP-users] Re: Reading/Write registers - Timeout

2025-02-17 Thread David Raeman via USRP-users
Hi Marino, a couple quick thoughts: 1. My previous message was based on legacy USRP architecture - I think with RFNoC radios, each block may have its own command queue. So the behavior may be different than mentioned in my earlier reply. 2. I think setting the command time to "lastPPS + s

[USRP-users] Re: High power TX/RX same antenna

2025-02-17 Thread Rob Kossler via USRP-users
If you are using TDD, you may need a T/R switch to switch out your receiver during transmission. If you are using FDD, you may need a diplexer. Rob On Mon, Feb 17, 2025 at 11:20 AM Stuart Austin < saus...@criticalsoftwaresystems.com> wrote: > Can you just add more attenuation between the output o

[USRP-users] Re: High power TX/RX same antenna

2025-02-17 Thread Stuart Austin
Can you just add more attenuation between the output of the circulator port that goes to the RX port on the N310? From: john.achkar.r...@gmail.com [mailto:john.achkar.r...@gmail.com] Sent: Monday, February 17, 2025 10:41 AM To: usrp-users@lists.ettus.com Subject: [USRP-users] High power TX/R

[USRP-users] High power TX/RX same antenna

2025-02-17 Thread john.achkar.r404
Hi, I am using a N310, with OAI to transmit 5G signal. I want to transmit 40 dBm using one antenna connected on both TX and RX ports. The best circulator I found has 18 dB isolation, which isn’t sufficient considering -15 dBm USRP max input power. What is the best approach to consider? Tha

[USRP-users] Re: Reading/Write registers - Timeout

2025-02-17 Thread cyberphox
Hi David, At the start where we initialise our siggen block there this snippet of code: --- ``` std::cout << "MB Clock Source: " << graph->get_mb_controller(0)->get_clock_source() << std::endl; ``` ``` std::cout << "MB Time Source: " << graph->get_mb_controller(0)->get_time_source() << std::e

[USRP-users] Re: Reading/Write registers - Timeout

2025-02-17 Thread David Raeman via USRP-users
Any chance you’re using timed commands elsewhere in your application? IIRC, there is one command FIFO, and a timed command that is waiting to start will block anything that comes in behind it, even if you didn’t intend for those other actions to wait. Except for timed streamer transfers, which a

[USRP-users] Re: Reading/Write registers - Timeout

2025-02-17 Thread cyberphox
Thanks for your reply. To answer your last question and give you some context. The ability to monitor FIFO status would be for debug purpose. The application we have that is interfacing to a custom RFNOC block via UHD can get are stuck (randomly over some period of time) and I am trying to fi

[USRP-users] Re: Reading/Write registers - Timeout

2025-02-17 Thread Martin Braun
Some bullets for you: - If you do peek32(), then you cannot skip ack, because the ack contains the read-response (i.e., your peek result). - For poke, if you don't set ack, then yes, it can still timeout. UHD will always wait for acks if it thinks the FIFO is full. If it didn't, you would lose the

[USRP-users] block control methods in the python api

2025-02-17 Thread Kevin Williams
Hi Everyone, I have a few "get()" and "set()" methods in my custom RFNoC block driver. I'm finding the documentation on using pybind a bit sketchy, and struggling to get these methods recognized in the python object representing my block. Is there perhaps an example I can follow somewhere? Many