[USRP-users] Re: Module not found when creating OOT module

I found explicitly including the verilog in the testbench using “\`include” worked. However, I found it to be the case that for any module that is needed, even if it was “added” by the builder. ___ USRP-users mailing list -- usrp-users@lists.ettus.com T

[USRP-users] Module not found when creating OOT module

Hello, I am currently trying to design my own OOT module, yet when I run ‘make testbenches’ I get the following error… `ERROR: [VRFC 10-2063] Module not found while processing module instance [/workarea/uhd/OOTs/rfnoc-trigger/fpga/rfnoc_block_trigger/rfnoc_block_trigger_tb.sv:123]` `ERROR: