Hi,
I want to map specific ranks to specific hosts on a cluster, in
not-so-usual patterns.
A very simplified example could be:
hosts ranks
===
node0 1,2,4
node1 3,4,6
Is there any way of specifying something like this in Open MPI?
Thank you,
Torje S. Henriksen
(tor...@stud.cs.ui
Oh man, sorry about that, and thanks for the fast response.
Let me try again, please :)
I want to manually specify what ranks should run on what node.
Here is an example of a mapping that I can't seem to be able to do, since
it isn't a round-robin type of mapping.
hosts ranks
===
nod
n but too complicated for open mpi, you'll have to make
your own script to generate the function. This shouldn't be hard to do with
any standard unix scripting.
. . christian
On Mon, 01 Oct 2007, Torje Henriksen wrote:
Oh man, sorry about that, and thanks for the fast respo
I can see that oversubscribing a sub-set of the
cores might seem silly. My question is, is it possible to do what I
want to do without hacking the open mpi code?
Guess I just wanted to know is there is a solution I overlooked before
I start hacking like a madman :)
Thanks
Torje Henriksen
Hi,
Thanks for the heads up Joseph, you sent me in the right direction.
Very helpful indeed, although the command that seems to be doing the
trick on my system is
$taskset -c X ...
Best regards,
Torje Henriksen
On Feb 7, 2008, at 2:47 PM, Joe Landman wrote:
Torje Henriksen wrote
an check if you are
curious :)
Best regards,
Torje Henriksen
On Apr 13, 2008, at 1:51 PM, Jeff Squyres wrote:
Sorry for the delays in replying.
The central problem is that Open MPI is much more aggressive about its
message passing progress than LAM is -- it simply wasn't designe
Hi Alberto,
The blocked processes are in fact spin-waiting. While they don't have
anything better to do (waiting for that message), they will check
their incoming message-queues in a loop.
So the MPI_Recv()-operation is blocking, but it doesn't mean that the
processes are blocked by the O
Hi!
If they are 8 core Intel machines, I believe this is the case:
*) Each pair of cores share an L2-cache. So using two cores that share
cache will probably reduce performance.
*) Each Quad core CPU has its own memory bus (Dual independent bus),
so using more than one core on a quad CPU can
