I'll try the MIPS (aka MIPS32) solution - hey, it
can't kill anything. There are some subtle
differences, but most MIPS64 boards'll run MIPS32 code
(I think in a similar way to the way AMD's 64-bit
chips also run 32-bit code).
However, for anyone planning a "native" MIPS64
solution, I've found a f
Hi,
Just a quick update on working with OpenMPI's MIPS
code on the MIPS64 processor. It does not appear to
work to simply use the atomic code for the 32-bit MIPS
- the opcodes don't correspond. Over the next day or
two, I will be updating the assembler on the MIPS64
board, and I'll know better the
Gah - shame on me. I let some IRIX-specific stuff slip through.
Lemme see if I can find an IRIX box and clean that up. The problems
you listed below are not MIPS 32 / MIPS 64 issues, but the use of
some nice IRIX-specific macros. By the way, to clarify, the assembly
has been tested on a
On Mon, Sep 12, 2005 at 07:24:43PM -0500, Brian Barrett wrote:
> By the way, to clarify, the assembly
> has been tested on a MIPS R14K in 64 bit mode (and 32 bit mode using
> SGI's n32 ABI -- it will not work with their o32 ABI).
In Linux/binutils lingo, that means it's MIPS64 code, and not M
