From: Nitin Garg
Under very rare timing circumstances, transition into
streaming mode might create a data corruption. Exists on
all Cortex-A9 revisions.
Signed-off-by: Nitin Garg
---
README |1 +
arch/arm/cpu/armv7/start.S |5 +
2 files changed, 6 insertions(+)
From: Nitin Garg
Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 845369.
Signed-off-by: Nitin Garg
---
include/configs/mx6_common.h |1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index e0528ce..8c0957a 100
From: Nitin Garg
Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 845369. The ARM errata 751472, 794072, 761320,
845369 only applied to the following configuration:
This erratum affects configurations with either:
- One processor if the ACP is present
- Two or more process
From: Nitin Garg
Since MX6 is Cortex-A9 r2p10, enable ARM errata
751472, 794072, 761320 only applied to the
following configuration:
This erratum affects configurations with either:
- One processor if the ACP is present
- Two or more processors
i.MX6 family does not have the ACP and thus on
From: Nitin Garg
Under very rare timing circumstances, transition into
streaming mode might create a data corruption. Exists on
all Cortex-A9 revisions.
Signed-off-by: Nitin Garg
---
Changes in v3: None
Changes in v2: None
README |1 +
arch/arm/cpu/armv7/start.S |
From: Nitin Garg
The ARM errata 845369 only applies to one processor
if the ACP is present OR two or more processors.
i.MX6 family does not have the ACP and thus only the MPCore
system will be impacted, which are the i.MX6DQ, i.MX6DL.
Signed-off-by: Nitin Garg
---
Changes in v3:
Split the pat
From: Nitin Garg
Under very rare timing circumstances, transition into
streaming mode might create a data corruption. Exists on
all Cortex-A9 revisions.
Signed-off-by: Nitin Garg
---
Changes in v3: None
Changes in v2: None
README |1 +
arch/arm/cpu/armv7/start.S |
From: Nitin Garg
Since MX6 is Cortex-A9 r2p10, enable ARM errata
751472, 794072, 761320 only applied to the
following configuration:
This erratum affects configurations with either:
- One processor if the ACP is present
- Two or more processors
i.MX6 family does not have the ACP and thus on
From: Nitin Garg
The ARM errata 845369 only applies to one processor
if the ACP is present OR two or more processors.
i.MX6 family does not have the ACP and thus only the MPCore
system will be impacted, which are the i.MX6DQ, i.MX6DL.
Signed-off-by: Nitin Garg
---
Changes in v3:
Split the pat
From: Nitin Garg
Support CPU temperature sensors on i.MX6 SoC.
Signed-off-by: Nitin Garg
---
arch/arm/cpu/armv7/mx6/soc.c | 137 +++-
arch/arm/imx-common/cpu.c|7 +-
arch/arm/include/asm/arch-mx6/crm_regs.h | 543 +-
arch/arm/in
From: Nitin Garg
This patch adds support for i.MX6 on chip temperature sensor support.
Nitin Garg (1):
Add i.MX6 CPU temperature sensor support
arch/arm/cpu/armv7/mx6/soc.c | 137 +++-
arch/arm/imx-common/cpu.c|7 +-
arch/arm/include/asm/arch-mx6/crm_regs
From: Nitin Garg
Support CPU temperature sensors on i.MX6 SoC.
Signed-off-by: Nitin Garg
---
arch/arm/cpu/armv7/mx6/soc.c | 137 +++-
arch/arm/imx-common/cpu.c|7 +-
arch/arm/include/asm/arch-mx6/crm_regs.h | 543 +-
arch/arm/in
From: Nitin Garg
This patch adds support for i.MX6 on chip temperature sensor support.
Nitin Garg (1):
Add i.MX6 CPU temperature sensor support
arch/arm/cpu/armv7/mx6/soc.c | 137 +++-
arch/arm/imx-common/cpu.c|7 +-
arch/arm/include/asm/arch-mx6/crm_regs
From: Nitin Garg
Signed-off-by: Nitin Garg
---
board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg| 169 ---
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg | 169 +++
configs/cgtqmx6qeval_defconfig |2 +-
configs/mx6qsabresd_defconfig
From: Nitin Garg
Since board/freescale/imx/ddr/ contains single file and that file
actually belongs to mx6sabresd, move it so that its move evident.
Nitin Garg (1):
Move board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg to
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg so that mx6sabresd
From: Nitin Garg
Add hab_auth_img u-boot command which can be used for HAB authentication
of images.
Signed-off-by: Nitin Garg
---
arch/arm/cpu/armv7/mx6/clock.c| 40 ++-
arch/arm/cpu/armv7/mx6/hab.c | 180 -
arch/arm/cpu/armv7/mx6/so
From: Nitin Garg
Add hab_auth_img u-boot command which can be used for HAB authentication
of images.
Nitin Garg (1):
Support i.MX6 High Assurance Boot (HAB) authentication of images
arch/arm/cpu/armv7/mx6/clock.c| 40 ++-
arch/arm/cpu/armv7/mx6/hab.c | 180 +++
From: Nitin Garg
i.MX6sl evk has a keyboard on the board, so add mxc_keyb driver to
support keypad.
Signed-off-by: Nitin Garg
---
drivers/input/Makefile |1 +
drivers/input/mxc_keyb.c | 588 ++
include/mxc_keyb.h | 240 +
From: Nitin Garg
i.MX6sl evk has a keyboard on the board, so add mxc_keyb driver to support
keypad.
Nitin Garg (1):
Add support for i.MX6SL EVK board keypad
drivers/input/Makefile |1 +
drivers/input/mxc_keyb.c | 588 ++
include/mxc_keyb.h
From: Nitin Garg
Add support for mx6 onchip temperature sensor and enable it
for all mx6sabre boards.
Nitin Garg (2):
Changes since v2:
- Split the patch into 2: Feature impl and board enablement
Changes since v1:
- Make temperature sensor feature configurable
- Checkpatch fixes
Add i.MX6 CP
From: Nitin Garg
Add CONFIG_IMX6_TEMP_SENSOR to mx6sabre_common.h file
Signed-off-by: Nitin Garg
---
include/configs/mx6sabre_common.h |1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/mx6sabre_common.h
b/include/configs/mx6sabre_common.h
index e59a3b4..fc38ede 100644
---
From: Nitin Garg
i.MX6 SoC has onChip temperature sensor. Add support
for this sensor.
Signed-off-by: Nitin Garg
---
arch/arm/cpu/armv7/mx6/soc.c | 138 +++-
arch/arm/imx-common/cpu.c|7 +-
arch/arm/include/asm/arch-mx6/crm_regs.h | 543 +++
From: Nitin Garg
Provide cgtqmx6eval board its own variant of ddr
setup config file. Move board/freescale/imx/ddr/
mx6q_4x_mt41j128.cfg to board/freescale/mx6sabresd/
as this is was designed for the mx6sabresd board.
Signed-off-by: Nitin Garg
---
Series-changes: 3
-Provide cgtqmx6eval board it
From: Nitin Garg
These patches implement workaround for 2 Cortex-A9 erratas.
Nitin Garg (2):
ARM: Add workaround for Cortex-A9 errata 794072
ARM: Add workaround for Cortex-A9 errata 761320
README |2 ++
arch/arm/cpu/armv7/start.S | 10 ++
2 files changed,
From: Nitin Garg
A short loop including a DMB instruction might cause a denial of
service on another processor which executes a CP15 broadcast operation.
Exists on r1, r2, r3, r4 revisions.
Signed-off-by: Nitin Garg
---
README |1 +
arch/arm/cpu/armv7/start.S |5 +++
From: Nitin Garg
Full cache line writes to the same memory region from at least two
processors might deadlock the processor. Exists on r1, r2, r3
revisions.
Signed-off-by: Nitin Garg
---
README |1 +
arch/arm/cpu/armv7/start.S |5 +
2 files changed, 6 insertions
From: Nitin Garg
These patches implement workaround for 2 Cortex-A9 erratas.
Enable these errata workaround for MX6.
Nitin Garg (3):
ARM: Add workaround for Cortex-A9 errata 794072
ARM: Add workaround for Cortex-A9 errata 761320
MX6: Enable ARM errata workaround 794072 and 761320
README
From: Nitin Garg
Full cache line writes to the same memory region from at least two
processors might deadlock the processor. Exists on r1, r2, r3
revisions.
Signed-off-by: Nitin Garg
---
README |1 +
arch/arm/cpu/armv7/start.S |5 +
2 files changed, 6 insertions
From: Nitin Garg
A short loop including a DMB instruction might cause a denial of
service on another processor which executes a CP15 broadcast operation.
Exists on r1, r2, r3, r4 revisions.
Signed-off-by: Nitin Garg
---
README |1 +
arch/arm/cpu/armv7/start.S |2 +-
From: Nitin Garg
Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 794072 and 761320.
Signed-off-by: Nitin Garg
---
include/configs/mx6_common.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common
From: Nitin Garg
Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 794072 and 761320.
Signed-off-by: Nitin Garg
---
include/configs/mx6_common.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common
From: Nitin Garg
These patches implement workaround for 2 Cortex-A9 erratas.
Enable these errata workaround for MX6.
Changes since v2:
- Added Acked-by Dirk Behme for PATCH 1/3
- Added Stefano for review
Changes since v1:
- Enabled these erratas for MX6 as suggested by Fabio Estevam
- Reuse
From: Nitin Garg
Full cache line writes to the same memory region from at least two
processors might deadlock the processor. Exists on r1, r2, r3
revisions.
Signed-off-by: Nitin Garg
---
README |1 +
arch/arm/cpu/armv7/start.S |5 +
2 files changed, 6 insertions
From: Nitin Garg
A short loop including a DMB instruction might cause a denial of
service on another processor which executes a CP15 broadcast operation.
Exists on r1, r2, r3, r4 revisions.
Signed-off-by: Nitin Garg
Acked-by: Dirk Behme
---
README |1 +
arch/arm/cpu/ar
From: Nitin Garg
Full cache line writes to the same memory region from at least two
processors might deadlock the processor. Exists on r1, r2, r3
revisions.
Signed-off-by: Nitin Garg
---
README |1 +
arch/arm/cpu/armv7/start.S |5 +
2 files changed, 6 insertions
From: Nitin Garg
Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 794072 and 761320.
Signed-off-by: Nitin Garg
---
include/configs/mx6_common.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common
From: Nitin Garg
These patches implement workaround for 2 Cortex-A9 erratas.
Enable these errata workaround for MX6.
Changes since v2:
- Added Acked-by Dirk Behme for PATCH 1/3
- Added Stefano for review
Changes since v1:
- Enabled these erratas for MX6 as suggested by Fabio Estevam
- Reuse
From: Nitin Garg
Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 794072 and 761320.
Signed-off-by: Nitin Garg
---
include/configs/mx6_common.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common
From: Nitin Garg
A short loop including a DMB instruction might cause a denial of
service on another processor which executes a CP15 broadcast operation.
Exists on r1, r2, r3, r4 revisions.
Signed-off-by: Nitin Garg
Acked-by: Dirk Behme
---
README |1 +
arch/arm/cpu/ar
From: Nitin Garg
i.MX6 SoC has onchip temperature sensor. Add driver
for this sensor.
Signed-off-by: Nitin Garg
---
drivers/Makefile |1 +
drivers/thermal/Makefile |8 +++
drivers/thermal/imx_thermal.c | 144 +
include/imx_ther
From: Nitin Garg
This patch set adds i.MX6 thermal sensor driver
and enables it for mx6sabre boards. Also adds
various anadig bit definitions as required for
upcoming drivers.
Changes in v6:
-Aligned imx thermal driver macro defines with kernel
Changes in v5:
-Don't modify the copyright of cpu.
From: Nitin Garg
read cpu temperature using the onchip thermal
sensor.
Signed-off-by: Nitin Garg
---
arch/arm/imx-common/cpu.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 09fc227..441c484 100644
--- a/arch/arm/imx-com
From: Nitin Garg
Add CONFIG_IMX6_THERMAL to mx6sabre_common.h file. Since
thermal driver depends on ocotp, make sure to enable
CONFIG_MXC_OCOTP when CONFIG_IMX6_THERMAL is slected.
Signed-off-by: Nitin Garg
---
include/configs/mx6sabre_common.h |3 ++-
1 file changed, 2 insertions(+), 1 de
From: Nitin Garg
Add api to check and enable pll3 as required
for thermal sensor driver.
Signed-off-by: Nitin Garg
---
arch/arm/cpu/armv7/mx6/clock.c| 25 +
arch/arm/include/asm/arch-mx6/clock.h |1 +
2 files changed, 26 insertions(+)
diff --git a/arch/ar
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